/*
- * Copyright (c) 2001-2005 The Regents of The University of Michigan
- * All rights reserved.
+ * Copyright (c) 2012 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * Authors: Ron Dreslinski
- */
-
-/* @file
+ * Authors: Andreas Hansson
*/
-#ifndef __PHYSICAL_MEMORY_HH__
-#define __PHYSICAL_MEMORY_HH__
+#ifndef __MEM_PHYSICAL_HH__
+#define __MEM_PHYSICAL_HH__
-#include "base/range.hh"
-#include "mem/mem_object.hh"
+#include "base/addr_range_map.hh"
#include "mem/packet.hh"
-#include "mem/tport.hh"
-#include "sim/eventq.hh"
-#include <map>
-#include <string>
-
-//
-// Functional model for a contiguous block of physical memory. (i.e. RAM)
-//
-class PhysicalMemory : public MemObject
-{
- class MemoryPort : public SimpleTimingPort
- {
- PhysicalMemory *memory;
- public:
+/**
+ * Forward declaration to avoid header dependencies.
+ */
+class AbstractMemory;
- MemoryPort(const std::string &_name, PhysicalMemory *_memory);
+/**
+ * A single entry for the backing store.
+ */
+class BackingStoreEntry
+{
+ public:
- protected:
+ /**
+ * Create a backing store entry. Don't worry about managing the memory
+ * pointers, because PhysicalMemory is responsible for that.
+ */
+ BackingStoreEntry(AddrRange range, uint8_t* pmem,
+ bool conf_table_reported, bool in_addr_map, bool kvm_map)
+ : range(range), pmem(pmem), confTableReported(conf_table_reported),
+ inAddrMap(in_addr_map), kvmMap(kvm_map)
+ {}
+
+ /**
+ * The address range covered in the guest.
+ */
+ AddrRange range;
+
+ /**
+ * Pointer to the host memory this range maps to. This memory is the same
+ * size as the range field.
+ */
+ uint8_t* pmem;
+
+ /**
+ * Whether this memory should be reported to the configuration table
+ */
+ bool confTableReported;
+
+ /**
+ * Whether this memory should appear in the global address map
+ */
+ bool inAddrMap;
+
+ /**
+ * Whether KVM should map this memory into the guest address space during
+ * acceleration.
+ */
+ bool kvmMap;
+};
- virtual Tick recvAtomic(PacketPtr pkt);
+/**
+ * The physical memory encapsulates all memories in the system and
+ * provides basic functionality for accessing those memories without
+ * going through the memory system and interconnect.
+ *
+ * The physical memory is also responsible for providing the host
+ * system backingstore used by the memories in the simulated guest
+ * system. When the system is created, the physical memory allocates
+ * the backing store based on the address ranges that are populated in
+ * the system, and does so independent of how those map to actual
+ * memory controllers. Thus, the physical memory completely abstracts
+ * the mapping of the backing store of the host system and the address
+ * mapping in the guest system. This enables us to arbitrarily change
+ * the number of memory controllers, and their address mapping, as
+ * long as the ranges stay the same.
+ */
+class PhysicalMemory : public Serializable
+{
- virtual void recvFunctional(PacketPtr pkt);
+ private:
- virtual void recvStatusChange(Status status);
+ // Name for debugging
+ std::string _name;
- virtual void getDeviceAddressRanges(AddrRangeList &resp,
- AddrRangeList &snoop);
+ // Global address map
+ AddrRangeMap<AbstractMemory*> addrMap;
- virtual int deviceBlockSize();
- };
+ // a mutable cache for the last address map iterator that matched
+ // an address
+ mutable AddrRangeMap<AbstractMemory*>::const_iterator rangeCache;
- int numPorts;
+ // All address-mapped memories
+ std::vector<AbstractMemory*> memories;
+ // The total memory size
+ uint64_t size;
- private:
- // prevent copying of a MainMemory object
- PhysicalMemory(const PhysicalMemory &specmem);
- const PhysicalMemory &operator=(const PhysicalMemory &specmem);
-
- protected:
-
- class LockedAddr {
- public:
- // on alpha, minimum LL/SC granularity is 16 bytes, so lower
- // bits need to masked off.
- static const Addr Addr_Mask = 0xf;
-
- static Addr mask(Addr paddr) { return (paddr & ~Addr_Mask); }
-
- Addr addr; // locked address
- int cpuNum; // locking CPU
- int threadNum; // locking thread ID within CPU
-
- // check for matching execution context
- bool matchesContext(Request *req)
- {
- return (cpuNum == req->getCpuNum() &&
- threadNum == req->getThreadNum());
- }
-
- LockedAddr(Request *req)
- : addr(mask(req->getPaddr())),
- cpuNum(req->getCpuNum()),
- threadNum(req->getThreadNum())
- {
- }
- };
-
- std::list<LockedAddr> lockedAddrList;
-
- // helper function for checkLockedAddrs(): we really want to
- // inline a quick check for an empty locked addr list (hopefully
- // the common case), and do the full list search (if necessary) in
- // this out-of-line function
- bool checkLockedAddrList(Request *req);
-
- // Record the address of a load-locked operation so that we can
- // clear the execution context's lock flag if a matching store is
- // performed
- void trackLoadLocked(Request *req);
-
- // Compare a store address with any locked addresses so we can
- // clear the lock flag appropriately. Return value set to 'false'
- // if store operation should be suppressed (because it was a
- // conditional store and the address was no longer locked by the
- // requesting execution context), 'true' otherwise. Note that
- // this method must be called on *all* stores since even
- // non-conditional stores must clear any matching lock addresses.
- bool writeOK(Request *req) {
- if (lockedAddrList.empty()) {
- // no locked addrs: nothing to check, store_conditional fails
- bool isLocked = req->isLocked();
- if (isLocked) {
- req->setScResult(0);
- }
- return !isLocked; // only do write if not an sc
- } else {
- // iterate over list...
- return checkLockedAddrList(req);
- }
- }
-
- uint8_t *pmemAddr;
- MemoryPort *port;
- int pagePtr;
- Tick lat;
+ // Let the user choose if we reserve swap space when calling mmap
+ const bool mmapUsingNoReserve;
- public:
- Addr new_page();
- uint64_t size() { return params()->addrRange.size(); }
+ // The physical memory used to provide the memory in the simulated
+ // system
+ std::vector<BackingStoreEntry> backingStore;
- struct Params
- {
- std::string name;
- Range<Addr> addrRange;
- Tick latency;
- };
+ // Prevent copying
+ PhysicalMemory(const PhysicalMemory&);
- protected:
- Params *_params;
+ // Prevent assignment
+ PhysicalMemory& operator=(const PhysicalMemory&);
- public:
- const Params *params() const { return _params; }
- PhysicalMemory(Params *p);
- virtual ~PhysicalMemory();
+ /**
+ * Create the memory region providing the backing store for a
+ * given address range that corresponds to a set of memories in
+ * the simulated system.
+ *
+ * @param range The address range covered
+ * @param memories The memories this range maps to
+ * @param kvm_map Should KVM map this memory for the guest
+ */
+ void createBackingStore(AddrRange range,
+ const std::vector<AbstractMemory*>& _memories,
+ bool conf_table_reported,
+ bool in_addr_map, bool kvm_map);
public:
- int deviceBlockSize();
- void getAddressRanges(AddrRangeList &resp, AddrRangeList &snoop);
- virtual Port *getPort(const std::string &if_name, int idx = -1);
- void virtual init();
- unsigned int drain(Event *de);
- protected:
- void doFunctionalAccess(PacketPtr pkt);
- virtual Tick calculateLatency(PacketPtr pkt);
- void recvStatusChange(Port::Status status);
-
- public:
- virtual void serialize(std::ostream &os);
- virtual void unserialize(Checkpoint *cp, const std::string §ion);
+ /**
+ * Create a physical memory object, wrapping a number of memories.
+ */
+ PhysicalMemory(const std::string& _name,
+ const std::vector<AbstractMemory*>& _memories,
+ bool mmap_using_noreserve);
+
+ /**
+ * Unmap all the backing store we have used.
+ */
+ ~PhysicalMemory();
+
+ /**
+ * Return the name for debugging and for creation of sections for
+ * checkpointing.
+ */
+ const std::string name() const { return _name; }
+
+ /**
+ * Check if a physical address is within a range of a memory that
+ * is part of the global address map.
+ *
+ * @param addr A physical address
+ * @return Whether the address corresponds to a memory
+ */
+ bool isMemAddr(Addr addr) const;
+
+ /**
+ * Get the memory ranges for all memories that are to be reported
+ * to the configuration table. The ranges are merged before they
+ * are returned such that any interleaved ranges appear as a
+ * single range.
+ *
+ * @return All configuration table memory ranges
+ */
+ AddrRangeList getConfAddrRanges() const;
+
+ /**
+ * Get the total physical memory size.
+ *
+ * @return The sum of all memory sizes
+ */
+ uint64_t totalSize() const { return size; }
+
+ /**
+ * Get the pointers to the backing store for external host
+ * access. Note that memory in the guest should be accessed using
+ * access() or functionalAccess(). This interface is primarily
+ * intended for CPU models using hardware virtualization. Note
+ * that memories that are null are not present, and that the
+ * backing store may also contain memories that are not part of
+ * the OS-visible global address map and thus are allowed to
+ * overlap.
+ *
+ * @return Pointers to the memory backing store
+ */
+ std::vector<BackingStoreEntry> getBackingStore() const
+ { return backingStore; }
+
+ /**
+ * Perform an untimed memory access and update all the state
+ * (e.g. locked addresses) and statistics accordingly. The packet
+ * is turned into a response if required.
+ *
+ * @param pkt Packet performing the access
+ */
+ void access(PacketPtr pkt);
+
+ /**
+ * Perform an untimed memory read or write without changing
+ * anything but the memory itself. No stats are affected by this
+ * access. In addition to normal accesses this also facilitates
+ * print requests.
+ *
+ * @param pkt Packet performing the access
+ */
+ void functionalAccess(PacketPtr pkt);
+
+ /**
+ * Serialize all the memories in the system. This is independent
+ * of the logical memory layout, and the serialization only sees
+ * the contigous backing store, independent of how this maps to
+ * logical memories in the guest system.
+ *
+ * @param os stream to serialize to
+ */
+ void serialize(CheckpointOut &cp) const override;
+
+ /**
+ * Serialize a specific store.
+ *
+ * @param store_id Unique identifier of this backing store
+ * @param range The address range of this backing store
+ * @param pmem The host pointer to this backing store
+ */
+ void serializeStore(CheckpointOut &cp, unsigned int store_id,
+ AddrRange range, uint8_t* pmem) const;
+
+ /**
+ * Unserialize the memories in the system. As with the
+ * serialization, this action is independent of how the address
+ * ranges are mapped to logical memories in the guest system.
+ */
+ void unserialize(CheckpointIn &cp) override;
+
+ /**
+ * Unserialize a specific backing store, identified by a section.
+ */
+ void unserializeStore(CheckpointIn &cp);
};
-#endif //__PHYSICAL_MEMORY_HH__
+#endif //__MEM_PHYSICAL_HH__
projects / gem5.git / blobdiff