SLICC: Remove WakeUp* import calls from ast/__init__.py

[gem5.git] / src / mem / physical.hh

diff --git a/src/mem/physical.hh b/src/mem/physical.hh
index 8dbadccc4bb9272647e838399a25fc89cad53601..cd6d809e240dd9a6c265b4cc3ee38dec1cb4e7dc 100644 (file)
--- a/src/mem/physical.hh
+++ b/src/mem/physical.hh
@@ -49,6 +49,8 @@
 //
 class PhysicalMemory : public MemObject
 {
+  protected:
+
     class MemoryPort : public SimpleTimingPort
     {
         PhysicalMemory *memory;
@@ -68,7 +70,7 @@ class PhysicalMemory : public MemObject
         virtual void getDeviceAddressRanges(AddrRangeList &resp,
                                             bool &snoop);
 
-        virtual int deviceBlockSize();
+        virtual unsigned deviceBlockSize() const;
     };
 
     int numPorts;
@@ -103,6 +105,11 @@ class PhysicalMemory : public MemObject
               contextId(req->contextId())
         {
         }
+        // constructor for unserialization use
+        LockedAddr(Addr _addr, int _cid)
+            : addr(_addr), contextId(_cid)
+        {
+        }
     };
 
     std::list<LockedAddr> lockedAddrList;
@@ -141,18 +148,16 @@ class PhysicalMemory : public MemObject
     }
 
     uint8_t *pmemAddr;
-    int pagePtr;
     Tick lat;
     Tick lat_var;
     std::vector<MemoryPort*> ports;
     typedef std::vector<MemoryPort*>::iterator PortIterator;
 
-    uint64_t cachedSize;
-    uint64_t cachedStart;
+    uint64_t _size;
+    uint64_t _start;
   public:
-    Addr new_page();
-    uint64_t size() { return cachedSize; }
-    uint64_t start() { return cachedStart; }
+    uint64_t size() { return _size; }
+    uint64_t start() { return _start; }
 
   public:
     typedef PhysicalMemoryParams Params;
@@ -166,7 +171,7 @@ class PhysicalMemory : public MemObject
     }
 
   public:
-    int deviceBlockSize();
+    unsigned deviceBlockSize() const;
     void getAddressRanges(AddrRangeList &resp, bool &snoop);
     virtual Port *getPort(const std::string &if_name, int idx = -1);
     void virtual init();