// defines
external_type(int, primitive="yes", default="0");
external_type(bool, primitive="yes", default="false");
-external_type(string, primitive="yes");
+external_type(std::string, primitive="yes");
external_type(uint64, primitive="yes");
external_type(Time, primitive="yes", default="0");
external_type(Address);
-external_type(DataBlock, desc="..."){
+structure(DataBlock, external = "yes", desc="..."){
void clear();
void copyPartial(DataBlock, int, int);
}
// Declarations of external types that are common to all protocols
// AccessPermission
+// The following five states define the access permission of all memory blocks.
+// These permissions have multiple uses. They coordinate locking and
+// synchronization primitives, as well as enable functional accesses.
+// One should not need to add any additional permission values and it is very
+// risky to do so.
enumeration(AccessPermission, desc="...", default="AccessPermission_NotPresent") {
- Busy, desc="No Read or Write";
- Read_Only, desc="Read Only";
- Read_Write, desc="Read/Write";
- Invalid, desc="Invalid";
- NotPresent, desc="NotPresent";
- OnHold, desc="Holding a place in dnuca cache";
- ReadUpgradingToWrite, desc="Read only, but trying to get Read/Write";
- Stale, desc="local L1 has a modified copy, assume L2 copy is stale data";
+ // Valid data
+ Read_Only, desc="block is Read Only (modulo functional writes)";
+ Read_Write, desc="block is Read/Write";
+
+ // Possibly Invalid data
+ // The maybe stale permission indicates that accordingly to the protocol,
+ // there is no guarantee the block contains valid data. However, functional
+ // writes should update the block because a dataless PUT request may
+ // revalidate the block's data.
+ Maybe_Stale, desc="block can be stale or revalidated by a dataless PUT";
+
+ // Invalid data
+ Invalid, desc="block is in an Invalid base state";
+ NotPresent, desc="block is NotPresent";
+ Busy, desc="block is in a transient state, currently invalid";
}
// TesterStatus
Check_Pending, desc="Check Pending";
}
-// SpecifiedGeneratorTypes
-enumeration(SpecifiedGeneratorType, desc="...") {
- DetermGETXGenerator, desc="deterministic GETX Tester";
- DetermInvGenerator, desc="deterministic all shared then invalidate Tester";
- DetermSeriesGETSGenerator, desc="deterministic Series of GETSs Tester for prefetcher tuning";
+// InvalidateGeneratorStatus
+enumeration(InvalidateGeneratorStatus, desc="...") {
+ Load_Waiting, desc="Load waiting to be issued";
+ Load_Pending, desc="Load issued";
+ Inv_Waiting, desc="Store (invalidate) waiting to be issued";
+ Inv_Pending, desc="Store (invalidate) issued";
}
-// RequestGeneratorStatus
-enumeration(RequestGeneratorStatus, desc="...") {
- Thinking, desc="Doing work between release and next acquire";
- Test_Pending, desc="Test pending";
- Before_Swap, desc="We're about to perform the swap";
- Swap_Pending, desc="The swap used for test-and-send is pending";
- Holding, desc="We are holding the lock performing the critical section";
- Release_Pending, desc="The write for the release is pending";
- Done, desc="Done, waiting for end of run";
-}
-
-// DetermGETXGeneratorStatus
-enumeration(DetermGETXGeneratorStatus, desc="...") {
- Thinking, desc="Doing work before next action";
- Store_Pending, desc="Store pending";
- Done, desc="Done, waiting for end of run";
-}
-
-// DetermGETXGeneratorStatus
-enumeration(DetermInvGeneratorStatus, desc="...") {
- Thinking, desc="Doing work before next action";
- Store_Pending, desc="Store pending";
- Load_Complete, desc="Load complete";
- Load_Pending, desc="Load pending";
- Done, desc="Done, waiting for end of run";
-}
-
-// DetermSeriesGETSGeneratorStatus
-enumeration(DetermSeriesGETSGeneratorStatus, desc="...") {
+// SeriesRequestGeneratorStatus
+enumeration(SeriesRequestGeneratorStatus, desc="...") {
Thinking, desc="Doing work before next action";
- Load_Pending, desc="Load pending";
- Done, desc="Done, waiting for end of run";
+ Request_Pending, desc="Request pending";
}
// LockStatus
ProtocolStall, desc="Protocol specified stall";
}
-// CacheRequestType
-enumeration(CacheRequestType, desc="...", default="CacheRequestType_NULL") {
- LD, desc="Load";
- ST, desc="Store";
- ATOMIC, desc="Atomic Load/Store";
- IFETCH, desc="Instruction fetch";
- IO, desc="I/O";
- REPLACEMENT, desc="Replacement";
- COMMIT, desc="Commit version";
- NULL, desc="Invalid request type";
+// RubyRequestType
+enumeration(RubyRequestType, desc="...", default="RubyRequestType_NULL") {
+ LD, desc="Load";
+ ST, desc="Store";
+ ATOMIC, desc="Atomic Load/Store";
+ IFETCH, desc="Instruction fetch";
+ IO, desc="I/O";
+ REPLACEMENT, desc="Replacement";
+ Load_Linked, desc="";
+ Store_Conditional, desc="";
+ RMW_Read, desc="";
+ RMW_Write, desc="";
+ Locked_RMW_Read, desc="";
+ Locked_RMW_Write, desc="";
+ COMMIT, desc="Commit version";
+ NULL, desc="Invalid request type";
+ FLUSH, desc="Flush request type";
}
enumeration(SequencerRequestType, desc="...", default="SequencerRequestType_NULL") {
Response_Control, desc="non-data response";
Writeback_Data, desc="Writeback data";
Writeback_Control, desc="Writeback control";
+ Broadcast_Control, desc="Broadcast control";
+ Multicast_Control, desc="Multicast control";
Forwarded_Control, desc="Forwarded control";
Invalidate_Control, desc="Invalidate control";
Unblock_Control, desc="Unblock control";
Write, desc="Writing to cache";
}
-// AccessModeType
-enumeration(AccessModeType, default="AccessModeType_UserMode", desc="...") {
- SupervisorMode, desc="Supervisor mode";
- UserMode, desc="User mode";
+// RubyAccessMode
+enumeration(RubyAccessMode, default="RubyAccessMode_User", desc="...") {
+ Supervisor, desc="Supervisor mode";
+ User, desc="User mode";
+ Device, desc="Device mode";
}
enumeration(PrefetchBit, default="PrefetchBit_No", desc="...") {
L2_HW, desc="This is a L2 hardware prefetch";
}
-// CacheMsg
-structure(CacheMsg, desc="...", interface="Message") {
- Address LineAddress, desc="Line address for this request";
- Address PhysicalAddress, desc="Physical address for this request";
- CacheRequestType Type, desc="Type of request (LD, ST, etc)";
- Address ProgramCounter, desc="Program counter of the instruction that caused the miss";
- AccessModeType AccessMode, desc="user/supervisor access type";
- int Size, desc="size in bytes of access";
- PrefetchBit Prefetch, desc="Is this a prefetch request";
-}
-
// CacheMsg
structure(SequencerMsg, desc="...", interface="Message") {
Address LineAddress, desc="Line address for this request";
Address PhysicalAddress, desc="Physical address for this request";
SequencerRequestType Type, desc="Type of request (LD, ST, etc)";
Address ProgramCounter, desc="Program counter of the instruction that caused the miss";
- AccessModeType AccessMode, desc="user/supervisor access type";
+ RubyAccessMode AccessMode, desc="user/supervisor access type";
DataBlock DataBlk, desc="Data";
int Len, desc="size in bytes of access";
PrefetchBit Prefetch, desc="Is this a prefetch request";
LocalTransient, desc="";
}
+// Request Status
+enumeration(RequestStatus, desc="...", default="RequestStatus_NULL") {
+ Ready, desc="The sequencer is ready and the request does not alias";
+ Issued, desc="The sequencer successfully issued the request";
+ BufferFull, desc="Can not issue because the sequencer is full";
+ Aliased, desc="This request aliased with a currently outstanding request";
+ NULL, desc="";
+}
-
+// LinkDirection
+enumeration(LinkDirection, desc="...") {
+ In, desc="Inward link direction";
+ Out, desc="Outward link direction";
+}
projects / gem5.git / blobdiff