#ifndef __MEM_REQUEST_HH__
#define __MEM_REQUEST_HH__
+#include "base/fast_alloc.hh"
#include "sim/host.hh"
-#include "sim/root.hh"
+#include "sim/core.hh"
#include <cassert>
const uint32_t NO_ALIGN_FAULT = 0x40000;
/** The request was an instruction read. */
const uint32_t INST_READ = 0x80000;
+/** This request is for a memory swap. */
+const uint32_t MEM_SWAP = 0x100000;
+const uint32_t MEM_SWAP_COND = 0x200000;
+/** The request should ignore unaligned access faults */
+const uint32_t NO_HALF_WORD_ALIGN_FAULT = 0x400000;
+
-class Request
+class Request : public FastAlloc
{
private:
/**
/** The virtual address of the request. */
Addr vaddr;
- /** The return value of store conditional. */
- uint64_t scResult;
+ /** Extra data for the request, such as the return value of
+ * store conditional or the compare value for a CAS. */
+ uint64_t extraData;
/** The cpu number (for statistics, typically). */
int cpuNum;
/** Whether or not the asid & vaddr are valid. */
bool validAsidVaddr;
/** Whether or not the sc result is valid. */
- bool validScResult;
+ bool validExData;
/** Whether or not the cpu number & thread ID are valid. */
bool validCpuAndThreadNums;
/** Whether or not the pc is valid. */
/** Minimal constructor. No fields are initialized. */
Request()
: validPaddr(false), validAsidVaddr(false),
- validScResult(false), validCpuAndThreadNums(false), validPC(false)
+ validExData(false), validCpuAndThreadNums(false), validPC(false)
{}
/**
setVirt(_asid, _vaddr, _size, _flags, _pc);
}
+ ~Request() {} // for FastAlloc
+
/**
* Set up CPU and thread numbers. */
void setThreadContext(int _cpuNum, int _threadNum)
validPaddr = true;
validAsidVaddr = false;
validPC = false;
- validScResult = false;
+ validExData = false;
mmapedIpr = false;
}
validPaddr = false;
validAsidVaddr = true;
validPC = true;
- validScResult = false;
+ validExData = false;
mmapedIpr = false;
}
int getSize() { assert(validPaddr || validAsidVaddr); return size; }
/** Accessor for time. */
Tick getTime() { assert(validPaddr || validAsidVaddr); return time; }
+ void resetTime() { assert(validPaddr || validAsidVaddr); time = curTick; }
/** Accessor for flags. */
uint32_t getFlags() { assert(validPaddr || validAsidVaddr); return flags; }
void setMmapedIpr(bool r) { assert(validAsidVaddr); mmapedIpr = r; }
/** Accessor function to check if sc result is valid. */
- bool scResultValid() { return validScResult; }
+ bool extraDataValid() { return validExData; }
/** Accessor function for store conditional return value.*/
- uint64_t getScResult() { assert(validScResult); return scResult; }
+ uint64_t getExtraData() { assert(validExData); return extraData; }
/** Accessor function for store conditional return value.*/
- void setScResult(uint64_t _scResult)
- { scResult = _scResult; validScResult = true; }
+ void setExtraData(uint64_t _extraData)
+ { extraData = _extraData; validExData = true; }
/** Accessor function for cpu number.*/
int getCpuNum() { assert(validCpuAndThreadNums); return cpuNum; }
bool isLocked() { return (getFlags() & LOCKED) != 0; }
+ bool isSwap() { return (getFlags() & MEM_SWAP ||
+ getFlags() & MEM_SWAP_COND); }
+
+ bool isCondSwap() { return (getFlags() & MEM_SWAP_COND) != 0; }
+
+ bool inline isMisaligned() {return (!(getFlags() & NO_ALIGN_FAULT) &&
+ ((vaddr & 1) ||
+ (!(getFlags() & NO_HALF_WORD_ALIGN_FAULT)
+ && (vaddr & 0x2))));}
+
friend class Packet;
};