/*
+ * Copyright (c) 2012-2013 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
* Copyright (c) 2002-2005 The Regents of The University of Michigan
+ * Copyright (c) 2010,2015 Advanced Micro Devices, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
#include "base/types.hh"
#include "sim/core.hh"
+/**
+ * Special TaskIds that are used for per-context-switch stats dumps
+ * and Cache Occupancy. Having too many tasks seems to be a problem
+ * with vector stats. 1024 seems to be a reasonable number that
+ * doesn't cause a problem with stats and is large enough to realistic
+ * benchmarks (Linux/Android boot, BBench, etc.)
+ */
+
+namespace ContextSwitchTaskId {
+ enum TaskId {
+ MaxNormalTaskId = 1021, /* Maximum number of normal tasks */
+ Prefetcher = 1022, /* For cache lines brought in by prefetcher */
+ DMA = 1023, /* Mostly Table Walker */
+ Unknown = 1024,
+ NumTaskId
+ };
+}
+
class Request;
typedef Request* RequestPtr;
{
public:
typedef uint32_t FlagsType;
+ typedef uint8_t ArchFlagsType;
typedef ::Flags<FlagsType> Flags;
- /** ASI information for this request if it exists. */
- static const FlagsType ASI_BITS = 0x000000FF;
- /** The request was an instruction fetch. */
- static const FlagsType INST_FETCH = 0x00000100;
- /** The virtual address is also the physical address. */
- static const FlagsType PHYSICAL = 0x00000200;
- /** The request is an ALPHA VPTE pal access (hw_ld). */
- static const FlagsType VPTE = 0x00000400;
- /** Use the alternate mode bits in ALPHA. */
- static const FlagsType ALTMODE = 0x00000800;
- /** The request is to an uncacheable address. */
- static const FlagsType UNCACHEABLE = 0x00001000;
- /** This request is to a memory mapped register. */
- static const FlagsType MMAPPED_IPR = 0x00002000;
- /** This request is a clear exclusive. */
- static const FlagsType CLEAR_LL = 0x00004000;
-
- /** The request should not cause a memory access. */
- static const FlagsType NO_ACCESS = 0x00080000;
- /** This request will lock or unlock the accessed memory. When used with
- * a load, the access locks the particular chunk of memory. When used
- * with a store, it unlocks. The rule is that locked accesses have to be
- * made up of a locked load, some operation on the data, and then a locked
- * store.
- */
- static const FlagsType LOCKED = 0x00100000;
- /** The request is a Load locked/store conditional. */
- static const FlagsType LLSC = 0x00200000;
- /** This request is for a memory swap. */
- static const FlagsType MEM_SWAP = 0x00400000;
- static const FlagsType MEM_SWAP_COND = 0x00800000;
-
- /** The request is a prefetch. */
- static const FlagsType PREFETCH = 0x01000000;
- /** The request should be prefetched into the exclusive state. */
- static const FlagsType PF_EXCLUSIVE = 0x02000000;
- /** The request should be marked as LRU. */
- static const FlagsType EVICT_NEXT = 0x04000000;
-
- /** These flags are *not* cleared when a Request object is reused
- (assigned a new address). */
- static const FlagsType STICKY_FLAGS = INST_FETCH;
-
- /** Request Ids that are statically allocated
+ enum : FlagsType {
+ /**
+ * Architecture specific flags.
+ *
+ * These bits int the flag field are reserved for
+ * architecture-specific code. For example, SPARC uses them to
+ * represent ASIs.
+ */
+ ARCH_BITS = 0x000000FF,
+ /** The request was an instruction fetch. */
+ INST_FETCH = 0x00000100,
+ /** The virtual address is also the physical address. */
+ PHYSICAL = 0x00000200,
+ /**
+ * The request is to an uncacheable address.
+ *
+ * @note Uncacheable accesses may be reordered by CPU models. The
+ * STRICT_ORDER flag should be set if such reordering is
+ * undesirable.
+ */
+ UNCACHEABLE = 0x00000400,
+ /**
+ * The request is required to be strictly ordered by <i>CPU
+ * models</i> and is non-speculative.
+ *
+ * A strictly ordered request is guaranteed to never be
+ * re-ordered or executed speculatively by a CPU model. The
+ * memory system may still reorder requests in caches unless
+ * the UNCACHEABLE flag is set as well.
+ */
+ STRICT_ORDER = 0x00000800,
+ /** This request is to a memory mapped register. */
+ MMAPPED_IPR = 0x00002000,
+ /** This request is made in privileged mode. */
+ PRIVILEGED = 0x00008000,
+
+ /**
+ * This is a write that is targeted and zeroing an entire
+ * cache block. There is no need for a read/modify/write
+ */
+ CACHE_BLOCK_ZERO = 0x00010000,
+
+ /** The request should not cause a memory access. */
+ NO_ACCESS = 0x00080000,
+ /**
+ * This request will lock or unlock the accessed memory. When
+ * used with a load, the access locks the particular chunk of
+ * memory. When used with a store, it unlocks. The rule is
+ * that locked accesses have to be made up of a locked load,
+ * some operation on the data, and then a locked store.
+ */
+ LOCKED_RMW = 0x00100000,
+ /** The request is a Load locked/store conditional. */
+ LLSC = 0x00200000,
+ /** This request is for a memory swap. */
+ MEM_SWAP = 0x00400000,
+ MEM_SWAP_COND = 0x00800000,
+
+ /** The request is a prefetch. */
+ PREFETCH = 0x01000000,
+ /** The request should be prefetched into the exclusive state. */
+ PF_EXCLUSIVE = 0x02000000,
+ /** The request should be marked as LRU. */
+ EVICT_NEXT = 0x04000000,
+
+ /**
+ * The request should be handled by the generic IPR code (only
+ * valid together with MMAPPED_IPR)
+ */
+ GENERIC_IPR = 0x08000000,
+
+ /** The request targets the secure memory space. */
+ SECURE = 0x10000000,
+ /** The request is a page table walk */
+ PT_WALK = 0x20000000,
+
+ /**
+ * These flags are *not* cleared when a Request object is
+ * reused (assigned a new address).
+ */
+ STICKY_FLAGS = INST_FETCH
+ };
+
+ /** Master Ids that are statically allocated
* @{*/
- /** This request id is used for writeback requests by the caches */
- static const MasterID wbMasterId = 0;
- /** This request id is used for functional requests that don't come from a
- * particular device
- */
- static const MasterID funcMasterId = 1;
- /** This request id is used for message signaled interrupts */
- static const MasterID intMasterId = 2;
- /** Invalid request id for assertion checking only. It is invalid behavior
- * to ever send this id as part of a request.
- * @todo C++1x replace with numeric_limits when constexpr is added */
- static const MasterID invldMasterId = USHRT_MAX;
+ enum : MasterID {
+ /** This master id is used for writeback requests by the caches */
+ wbMasterId = 0,
+ /**
+ * This master id is used for functional requests that
+ * don't come from a particular device
+ */
+ funcMasterId = 1,
+ /** This master id is used for message signaled interrupts */
+ intMasterId = 2,
+ /**
+ * Invalid master id for assertion checking only. It is
+ * invalid behavior to ever send this id as part of a request.
+ */
+ invldMasterId = std::numeric_limits<MasterID>::max()
+ };
/** @} */
private:
typedef uint8_t PrivateFlagsType;
typedef ::Flags<PrivateFlagsType> PrivateFlags;
- /** Whether or not the size is valid. */
- static const PrivateFlagsType VALID_SIZE = 0x00000001;
- /** Whether or not paddr is valid (has been written yet). */
- static const PrivateFlagsType VALID_PADDR = 0x00000002;
- /** Whether or not the vaddr & asid are valid. */
- static const PrivateFlagsType VALID_VADDR = 0x00000004;
- /** Whether or not the pc is valid. */
- static const PrivateFlagsType VALID_PC = 0x00000010;
- /** Whether or not the context ID is valid. */
- static const PrivateFlagsType VALID_CONTEXT_ID = 0x00000020;
- static const PrivateFlagsType VALID_THREAD_ID = 0x00000040;
- /** Whether or not the sc result is valid. */
- static const PrivateFlagsType VALID_EXTRA_DATA = 0x00000080;
-
- /** These flags are *not* cleared when a Request object is reused
- (assigned a new address). */
- static const PrivateFlagsType STICKY_PRIVATE_FLAGS =
- VALID_CONTEXT_ID | VALID_THREAD_ID;
+ enum : PrivateFlagsType {
+ /** Whether or not the size is valid. */
+ VALID_SIZE = 0x00000001,
+ /** Whether or not paddr is valid (has been written yet). */
+ VALID_PADDR = 0x00000002,
+ /** Whether or not the vaddr & asid are valid. */
+ VALID_VADDR = 0x00000004,
+ /** Whether or not the pc is valid. */
+ VALID_PC = 0x00000010,
+ /** Whether or not the context ID is valid. */
+ VALID_CONTEXT_ID = 0x00000020,
+ VALID_THREAD_ID = 0x00000040,
+ /** Whether or not the sc result is valid. */
+ VALID_EXTRA_DATA = 0x00000080,
+
+ /**
+ * These flags are *not* cleared when a Request object is reused
+ * (assigned a new address).
+ */
+ STICKY_PRIVATE_FLAGS = VALID_CONTEXT_ID | VALID_THREAD_ID
+ };
private:
+
+ /**
+ * Set up a physical (e.g. device) request in a previously
+ * allocated Request object.
+ */
+ void
+ setPhys(Addr paddr, unsigned size, Flags flags, MasterID mid, Tick time)
+ {
+ assert(size >= 0);
+ _paddr = paddr;
+ _size = size;
+ _time = time;
+ _masterId = mid;
+ _flags.clear(~STICKY_FLAGS);
+ _flags.set(flags);
+ privateFlags.clear(~STICKY_PRIVATE_FLAGS);
+ privateFlags.set(VALID_PADDR|VALID_SIZE);
+ depth = 0;
+ accessDelta = 0;
+ //translateDelta = 0;
+ }
+
/**
* The physical address of the request. Valid only if validPaddr
* is set.
* paddr is written via setVirt() or setPhys(), so it is always
* valid as long as one of the address fields is valid.
*/
- int _size;
+ unsigned _size;
/** The requestor ID which is unique in the system for all ports
* that are capable of issuing a transaction
*/
Tick _time;
+ /**
+ * The task id associated with this request
+ */
+ uint32_t _taskId;
+
/** The address space ID. */
int _asid;
uint64_t _extraData;
/** The context ID (for statistics, typically). */
- int _contextId;
+ ContextID _contextId;
/** The thread ID (id within this CPU) */
- int _threadId;
+ ThreadID _threadId;
/** program counter of initiating access; for tracing/debugging */
Addr _pc;
public:
- /** Minimal constructor. No fields are initialized.
- * (Note that _flags and privateFlags are cleared by Flags
- * default constructor.)
+
+ /**
+ * Minimal constructor. No fields are initialized. (Note that
+ * _flags and privateFlags are cleared by Flags default
+ * constructor.)
*/
Request()
+ : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
+ _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
+ _extraData(0), _contextId(0), _threadId(0), _pc(0),
+ translateDelta(0), accessDelta(0), depth(0)
{}
/**
* Constructor for physical (e.g. device) requests. Initializes
* just physical address, size, flags, and timestamp (to curTick()).
- * These fields are adequate to perform a request.
+ * These fields are adequate to perform a request.
*/
- Request(Addr paddr, int size, Flags flags, MasterID mid)
+ Request(Addr paddr, unsigned size, Flags flags, MasterID mid)
+ : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
+ _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
+ _extraData(0), _contextId(0), _threadId(0), _pc(0),
+ translateDelta(0), accessDelta(0), depth(0)
{
- setPhys(paddr, size, flags, mid);
+ setPhys(paddr, size, flags, mid, curTick());
}
- Request(Addr paddr, int size, Flags flags, MasterID mid, Tick time)
+ Request(Addr paddr, unsigned size, Flags flags, MasterID mid, Tick time)
+ : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
+ _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
+ _extraData(0), _contextId(0), _threadId(0), _pc(0),
+ translateDelta(0), accessDelta(0), depth(0)
{
setPhys(paddr, size, flags, mid, time);
}
- Request(Addr paddr, int size, Flags flags, MasterID mid, Tick time, Addr pc)
+ Request(Addr paddr, unsigned size, Flags flags, MasterID mid, Tick time,
+ Addr pc)
+ : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
+ _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
+ _extraData(0), _contextId(0), _threadId(0), _pc(0),
+ translateDelta(0), accessDelta(0), depth(0)
{
setPhys(paddr, size, flags, mid, time);
privateFlags.set(VALID_PC);
_pc = pc;
}
- Request(int asid, Addr vaddr, int size, Flags flags, MasterID mid, Addr pc,
- int cid, ThreadID tid)
+ Request(int asid, Addr vaddr, unsigned size, Flags flags, MasterID mid,
+ Addr pc, ContextID cid, ThreadID tid)
+ : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
+ _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
+ _extraData(0), _contextId(0), _threadId(0), _pc(0),
+ translateDelta(0), accessDelta(0), depth(0)
{
setVirt(asid, vaddr, size, flags, mid, pc);
setThreadContext(cid, tid);
* Set up CPU and thread numbers.
*/
void
- setThreadContext(int context_id, ThreadID tid)
+ setThreadContext(ContextID context_id, ThreadID tid)
{
_contextId = context_id;
_threadId = tid;
privateFlags.set(VALID_CONTEXT_ID|VALID_THREAD_ID);
}
- /**
- * Set up a physical (e.g. device) request in a previously
- * allocated Request object.
- */
- void
- setPhys(Addr paddr, int size, Flags flags, MasterID mid, Tick time)
- {
- assert(size >= 0);
- _paddr = paddr;
- _size = size;
- _time = time;
- _masterId = mid;
- _flags.clear(~STICKY_FLAGS);
- _flags.set(flags);
- privateFlags.clear(~STICKY_PRIVATE_FLAGS);
- privateFlags.set(VALID_PADDR|VALID_SIZE);
- }
-
- void
- setPhys(Addr paddr, int size, Flags flags, MasterID mid)
- {
- setPhys(paddr, size, flags, mid, curTick());
- }
-
/**
* Set up a virtual (e.g., CPU) request in a previously
* allocated Request object.
*/
void
- setVirt(int asid, Addr vaddr, int size, Flags flags, MasterID mid, Addr pc)
+ setVirt(int asid, Addr vaddr, unsigned size, Flags flags, MasterID mid,
+ Addr pc)
{
- assert(size >= 0);
_asid = asid;
_vaddr = vaddr;
_size = size;
_flags.set(flags);
privateFlags.clear(~STICKY_PRIVATE_FLAGS);
privateFlags.set(VALID_VADDR|VALID_SIZE|VALID_PC);
+ depth = 0;
+ accessDelta = 0;
+ translateDelta = 0;
}
/**
- * Set just the physical address. This should only be used to
- * record the result of a translation, and thus the vaddr must be
- * valid before this method is called. Otherwise, use setPhys()
- * to guarantee that the size and flags are also set.
+ * Set just the physical address. This usually used to record the
+ * result of a translation. However, when using virtualized CPUs
+ * setPhys() is sometimes called to finalize a physical address
+ * without a virtual address, so we can't check if the virtual
+ * address is valid.
*/
void
setPaddr(Addr paddr)
{
- assert(privateFlags.isSet(VALID_VADDR));
_paddr = paddr;
privateFlags.set(VALID_PADDR);
}
assert(privateFlags.isSet(VALID_VADDR));
assert(privateFlags.noneSet(VALID_PADDR));
assert(split_addr > _vaddr && split_addr < _vaddr + _size);
- req1 = new Request;
- *req1 = *this;
- req2 = new Request;
- *req2 = *this;
+ req1 = new Request(*this);
+ req2 = new Request(*this);
req1->_size = split_addr - _vaddr;
req2->_vaddr = split_addr;
req2->_size = _size - req1->_size;
* Accessor for paddr.
*/
bool
- hasPaddr()
+ hasPaddr() const
{
return privateFlags.isSet(VALID_PADDR);
}
Addr
- getPaddr()
+ getPaddr() const
{
assert(privateFlags.isSet(VALID_PADDR));
return _paddr;
}
+ /**
+ * Time for the TLB/table walker to successfully translate this request.
+ */
+ Tick translateDelta;
+
+ /**
+ * Access latency to complete this memory transaction not including
+ * translation time.
+ */
+ Tick accessDelta;
+
+ /**
+ * Level of the cache hierachy where this request was responded to
+ * (e.g. 0 = L1; 1 = L2).
+ */
+ mutable int depth;
+
/**
* Accessor for size.
*/
bool
- hasSize()
+ hasSize() const
{
return privateFlags.isSet(VALID_SIZE);
}
- int
- getSize()
+ unsigned
+ getSize() const
{
assert(privateFlags.isSet(VALID_SIZE));
return _size;
return _time;
}
- void
- time(Tick time)
- {
- assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR));
- _time = time;
- }
-
/** Accessor for flags. */
Flags
getFlags()
}
/** Note that unlike other accessors, this function sets *specific
- flags* (ORs them in); it does not assign its argument to the
- _flags field. Thus this method should rightly be called
- setFlags() and not just flags(). */
+ flags* (ORs them in); it does not assign its argument to the
+ _flags field. Thus this method should rightly be called
+ setFlags() and not just flags(). */
void
setFlags(Flags flags)
{
}
/** Accessor function for vaddr.*/
+ bool
+ hasVaddr() const
+ {
+ return privateFlags.isSet(VALID_VADDR);
+ }
+
Addr
- getVaddr()
+ getVaddr() const
{
assert(privateFlags.isSet(VALID_VADDR));
return _vaddr;
/** Accesssor for the requestor id. */
MasterID
- masterId()
+ masterId() const
{
return _masterId;
}
+ uint32_t
+ taskId() const
+ {
+ return _taskId;
+ }
+
+ void
+ taskId(uint32_t id) {
+ _taskId = id;
+ }
+
/** Accessor function for asid.*/
int
- getAsid()
+ getAsid() const
{
assert(privateFlags.isSet(VALID_VADDR));
return _asid;
_asid = asid;
}
- /** Accessor function for asi.*/
- uint8_t
- getAsi()
+ /** Accessor function for architecture-specific flags.*/
+ ArchFlagsType
+ getArchFlags() const
{
- assert(privateFlags.isSet(VALID_VADDR));
- return _flags & ASI_BITS;
+ assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR));
+ return _flags & ARCH_BITS;
}
/** Accessor function to check if sc result is valid. */
bool
- extraDataValid()
+ extraDataValid() const
{
return privateFlags.isSet(VALID_EXTRA_DATA);
}
}
/** Accessor function for context ID.*/
- int
+ ContextID
contextId() const
{
assert(privateFlags.isSet(VALID_CONTEXT_ID));
}
/** Accessor function for thread ID. */
- int
+ ThreadID
threadId() const
{
assert(privateFlags.isSet(VALID_THREAD_ID));
return _threadId;
}
+ void
+ setPC(Addr pc)
+ {
+ privateFlags.set(VALID_PC);
+ _pc = pc;
+ }
+
bool
hasPC() const
{
return _pc;
}
+ /**
+ * Increment/Get the depth at which this request is responded to.
+ * This currently happens when the request misses in any cache level.
+ */
+ void incAccessDepth() const { depth++; }
+ int getAccessDepth() const { return depth; }
+
+ /**
+ * Set/Get the time taken for this request to be successfully translated.
+ */
+ void setTranslateLatency() { translateDelta = curTick() - _time; }
+ Tick getTranslateLatency() const { return translateDelta; }
+
+ /**
+ * Set/Get the time taken to complete this request's access, not including
+ * the time to successfully translate the request.
+ */
+ void setAccessLatency() { accessDelta = curTick() - _time - translateDelta; }
+ Tick getAccessLatency() const { return accessDelta; }
+
/** Accessor functions for flags. Note that these are for testing
- only; setting flags should be done via setFlags(). */
+ only; setting flags should be done via setFlags(). */
bool isUncacheable() const { return _flags.isSet(UNCACHEABLE); }
+ bool isStrictlyOrdered() const { return _flags.isSet(STRICT_ORDER); }
bool isInstFetch() const { return _flags.isSet(INST_FETCH); }
bool isPrefetch() const { return _flags.isSet(PREFETCH); }
bool isLLSC() const { return _flags.isSet(LLSC); }
- bool isLocked() const { return _flags.isSet(LOCKED); }
+ bool isPriv() const { return _flags.isSet(PRIVILEGED); }
+ bool isLockedRMW() const { return _flags.isSet(LOCKED_RMW); }
bool isSwap() const { return _flags.isSet(MEM_SWAP|MEM_SWAP_COND); }
bool isCondSwap() const { return _flags.isSet(MEM_SWAP_COND); }
bool isMmappedIpr() const { return _flags.isSet(MMAPPED_IPR); }
- bool isClearLL() const { return _flags.isSet(CLEAR_LL); }
+ bool isSecure() const { return _flags.isSet(SECURE); }
+ bool isPTWalk() const { return _flags.isSet(PT_WALK); }
};
#endif // __MEM_REQUEST_HH__
projects / gem5.git / blobdiff