cpu: Apply the ARM TLB rework to the O3 checker CPU.

[gem5.git] / src / mem / se_translating_port_proxy.hh

diff --git a/src/mem/se_translating_port_proxy.hh b/src/mem/se_translating_port_proxy.hh
index 1c8828bbf8b3bee4563af082a55379edd50fa932..e32f1d0e3adfd74e16ec1c88bc71084afcba82ad 100644 (file)
--- a/src/mem/se_translating_port_proxy.hh
+++ b/src/mem/se_translating_port_proxy.hh
@@ -80,13 +80,15 @@ class SETranslatingPortProxy : public PortProxy
     AllocType allocating;
 
   public:
-    SETranslatingPortProxy(MasterPort& port, Process* p, AllocType alloc);
+    SETranslatingPortProxy(SendFunctionalFunc func,
+                           Process* p, AllocType alloc);
+    SETranslatingPortProxy(MasterPort &port, Process* p, AllocType alloc);
     ~SETranslatingPortProxy() {}
 
     void setPageTable(EmulationPageTable *p) { pTable = p; }
     void setProcess(Process *p) { process = p; }
-    bool tryReadBlob(Addr addr, uint8_t *p, int size) const override;
-    bool tryWriteBlob(Addr addr, const uint8_t *p, int size) const override;
+    bool tryReadBlob(Addr addr, void *p, int size) const override;
+    bool tryWriteBlob(Addr addr, const void *p, int size) const override;
     bool tryMemsetBlob(Addr addr, uint8_t val, int size) const override;
 };