mem-cache: Create an address aware TempCacheBlk

[gem5.git] / src / mem / serial_link.cc

diff --git a/src/mem/serial_link.cc b/src/mem/serial_link.cc
index 25f5291bba60278c5ce826a20acfcc384664b277..97563c0d0838c33abe7d3102ea569912ac7350f5 100644 (file)
--- a/src/mem/serial_link.cc
+++ b/src/mem/serial_link.cc
@@ -56,7 +56,6 @@
 #include "debug/SerialLink.hh"
 #include "params/SerialLink.hh"
 
-
 SerialLink::SerialLinkSlavePort::SerialLinkSlavePort(const std::string& _name,
                                          SerialLink& _serial_link,
                                          SerialLinkMasterPort& _masterPort,
@@ -67,7 +66,8 @@ SerialLink::SerialLinkSlavePort::SerialLinkSlavePort(const std::string& _name,
       masterPort(_masterPort), delay(_delay),
       ranges(_ranges.begin(), _ranges.end()),
       outstandingResponses(0), retryReq(false),
-      respQueueLimit(_resp_limit), sendEvent(*this)
+      respQueueLimit(_resp_limit),
+      sendEvent([this]{ trySendTiming(); }, _name)
 {
 }
 
@@ -77,7 +77,7 @@ SerialLink::SerialLinkMasterPort::SerialLinkMasterPort(const std::string&
                                            Cycles _delay, int _req_limit)
     : MasterPort(_name, &_serial_link), serial_link(_serial_link),
       slavePort(_slavePort), delay(_delay), reqQueueLimit(_req_limit),
-      sendEvent(*this)
+      sendEvent([this]{ trySendTiming(); }, _name)
 {
 }