mem-cache: Add match functions to QueueEntry

[gem5.git] / src / mem / simple_mem.hh

diff --git a/src/mem/simple_mem.hh b/src/mem/simple_mem.hh
index 6636f2c9062685d5e7a98692fc81823172ae2563..bb11268a6bac79377ab117cacd38ad8a1a9d6c78 100644 (file)
--- a/src/mem/simple_mem.hh
+++ b/src/mem/simple_mem.hh
@@ -46,8 +46,8 @@
  * SimpleMemory declaration
  */
 
-#ifndef __SIMPLE_MEMORY_HH__
-#define __SIMPLE_MEMORY_HH__
+#ifndef __MEM_SIMPLE_MEMORY_HH__
+#define __MEM_SIMPLE_MEMORY_HH__
 
 #include <list>
 
@@ -84,27 +84,20 @@ class SimpleMemory : public AbstractMemory
 
     class MemoryPort : public SlavePort
     {
-
       private:
-
         SimpleMemory& memory;
 
       public:
-
         MemoryPort(const std::string& _name, SimpleMemory& _memory);
 
       protected:
-
-        Tick recvAtomic(PacketPtr pkt);
-
-        void recvFunctional(PacketPtr pkt);
-
-        bool recvTimingReq(PacketPtr pkt);
-
-        void recvRespRetry();
-
-        AddrRangeList getAddrRanges() const;
-
+        Tick recvAtomic(PacketPtr pkt) override;
+        Tick recvAtomicBackdoor(
+                PacketPtr pkt, MemBackdoorPtr &_backdoor) override;
+        void recvFunctional(PacketPtr pkt) override;
+        bool recvTimingReq(PacketPtr pkt) override;
+        void recvRespRetry() override;
+        AddrRangeList getAddrRanges() const override;
     };
 
     MemoryPort port;
@@ -187,20 +180,16 @@ class SimpleMemory : public AbstractMemory
 
     DrainState drain() override;
 
-    BaseSlavePort& getSlavePort(const std::string& if_name,
-                                PortID idx = InvalidPortID) override;
+    Port &getPort(const std::string &if_name,
+                  PortID idx=InvalidPortID) override;
     void init() override;
 
   protected:
-
     Tick recvAtomic(PacketPtr pkt);
-
+    Tick recvAtomicBackdoor(PacketPtr pkt, MemBackdoorPtr &_backdoor);
     void recvFunctional(PacketPtr pkt);
-
     bool recvTimingReq(PacketPtr pkt);
-
     void recvRespRetry();
-
 };
 
-#endif //__SIMPLE_MEMORY_HH__
+#endif //__MEM_SIMPLE_MEMORY_HH__