mem: Fix guest corruption when caches handle uncacheable accesses

[gem5.git] / src / mem / tport.cc

diff --git a/src/mem/tport.cc b/src/mem/tport.cc
index bf3d59a8f93905590d452600b5670f71d9b048d5..7a0dd7cd9dd6a1be2fa8128f64ca01a3ed62e780 100644 (file)
--- a/src/mem/tport.cc
+++ b/src/mem/tport.cc
@@ -46,14 +46,13 @@
 
 SimpleTimingPort::SimpleTimingPort(const std::string& _name,
                                    MemObject* _owner) :
-    QueuedPort(_name, _owner, queue), queue(*_owner, *this)
+    QueuedSlavePort(_name, _owner, queueImpl), queueImpl(*_owner, *this)
 {
 }
 
 void
 SimpleTimingPort::recvFunctional(PacketPtr pkt)
 {
-    assert(pkt->isRequest());
     if (!queue.checkFunctional(pkt)) {
         // do an atomic access and throw away the returned latency
         recvAtomic(pkt);
@@ -61,8 +60,14 @@ SimpleTimingPort::recvFunctional(PacketPtr pkt)
 }
 
 bool
-SimpleTimingPort::recvTiming(PacketPtr pkt)
+SimpleTimingPort::recvTimingReq(PacketPtr pkt)
 {
+    /// @todo temporary hack to deal with memory corruption issue until
+    /// 4-phase transactions are complete. Remove me later
+    for (int x = 0; x < pendingDelete.size(); x++)
+        delete pendingDelete[x];
+    pendingDelete.clear();
+
     if (pkt->memInhibitAsserted()) {
         // snooper will supply based on copy of packet
         // still target's responsibility to delete packet
@@ -77,9 +82,12 @@ SimpleTimingPort::recvTiming(PacketPtr pkt)
         // recvAtomic() should already have turned packet into
         // atomic response
         assert(pkt->isResponse());
-        queue.schedSendTiming(pkt, curTick() + latency);
+        schedTimingResp(pkt, curTick() + latency);
     } else {
-        delete pkt;
+        /// @todo nominally we should just delete the packet here.
+        /// Until 4-phase stuff we can't because the sending
+        /// cache is still relying on it
+        pendingDelete.push_back(pkt);
     }
 
     return true;