fix up radeon span functions using latest r200 code from Brian,

[mesa.git] / src / mesa / drivers / dri / i915 / i830_reg.h

diff --git a/src/mesa/drivers/dri/i915/i830_reg.h b/src/mesa/drivers/dri/i915/i830_reg.h
index 176c869736040724a64bbd6cb430ed0720c1ed98..c45b88ca520cb9eca10b370244c58d9543fcf3a9 100644 (file)
--- a/src/mesa/drivers/dri/i915/i830_reg.h
+++ b/src/mesa/drivers/dri/i915/i830_reg.h
@@ -3,6 +3,26 @@
  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
  * All Rights Reserved.
  * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
  **************************************************************************/
 
 
@@ -185,21 +205,6 @@
 #define ENABLE_DST_ABLEND_FACTOR       (1<<5)
 #define DST_ABLEND_FACT(x)             (x)
 
-#define BLENDFACT_ZERO                 0x01
-#define BLENDFACT_ONE                  0x02
-#define BLENDFACT_SRC_COLR             0x03
-#define BLENDFACT_INV_SRC_COLR                 0x04
-#define BLENDFACT_SRC_ALPHA            0x05
-#define BLENDFACT_INV_SRC_ALPHA        0x06
-#define BLENDFACT_DST_ALPHA            0x07
-#define BLENDFACT_INV_DST_ALPHA        0x08
-#define BLENDFACT_DST_COLR             0x09
-#define BLENDFACT_INV_DST_COLR         0x0a
-#define BLENDFACT_SRC_ALPHA_SATURATE   0x0b
-#define BLENDFACT_CONST_COLOR          0x0c
-#define BLENDFACT_INV_CONST_COLOR      0x0d
-#define BLENDFACT_CONST_ALPHA          0x0e
-#define BLENDFACT_INV_CONST_ALPHA      0x0f
 
 /* _3DSTATE_MAP_BLEND_ARG, p152 */
 #define _3DSTATE_MAP_BLEND_ARG_CMD(stage)      (CMD_3D|(0x0e<<24)|((stage)<<20))
@@ -343,19 +348,6 @@
 #define SRC_BLND_FACT(x)               ((x)<<6)
 #define DST_BLND_FACT(x)               (x)
 
-/* Use the blendfact defines for BLND_FACTOR macros */
-#if 0
-#define BLENDFACT_ZERO                 0x01
-#define BLENDFACT_ONE                  0x02
-#define BLENDFACT_SRC_COLR             0x03
-#define BLENDFACT_INV_SRC_COLR                 0x04
-#define BLENDFACT_SRC_ALPHA            0x05
-#define BLENDFACT_INV_SRC_ALPHA        0x06
-#define BLENDFACT_DST_ALPHA            0x07
-#define BLENDFACT_INV_DST_ALPHA        0x08
-#define BLENDFACT_CONST_ALPHA          0x0e
-#define BLENDFACT_INV_CONST_ALPHA      0x0f
-#endif
 
 /* _3DSTATE_MODES_2, p192 */
 #define _3DSTATE_MODES_2_CMD           (CMD_3D|(0x0f<<24))
@@ -367,14 +359,6 @@
 #define ALPHA_REF_VALUE(x)             (x)
 
 #define ALPHA_TEST_REF_MASK            0x3fff
-#define COMPAREFUNC_ALWAYS             0
-#define COMPAREFUNC_NEVER              0x1
-#define COMPAREFUNC_LESS               0x2
-#define COMPAREFUNC_EQUAL              0x3
-#define COMPAREFUNC_LEQUAL             0x4
-#define COMPAREFUNC_GREATER            0x5
-#define COMPAREFUNC_NOTEQUAL           0x6
-#define COMPAREFUNC_GEQUAL             0x7
 
 /* _3DSTATE_MODES_3, p193 */
 #define _3DSTATE_MODES_3_CMD           (CMD_3D|(0x02<<24))
@@ -475,15 +459,6 @@
 #define STENCIL_PASS_DEPTH_FAIL_OP(x)  ((x)<<17)
 #define STENCIL_PASS_DEPTH_PASS_OP(x)  ((x)<<14)
 
-#define STENCILOP_KEEP                 0
-#define STENCILOP_ZERO                 0x1
-#define STENCILOP_REPLACE              0x2
-#define STENCILOP_INCRSAT              0x3
-#define STENCILOP_DECRSAT              0x4
-#define STENCILOP_INCR                 0x5
-#define STENCILOP_DECR                 0x6
-#define STENCILOP_INVERT               0x7
-
 #define ENABLE_STENCIL_TEST_FUNC_MASK  ((1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9))
 #define ENABLE_STENCIL_TEST_FUNC       (1<<13)
 /* Uses COMPAREFUNC */
@@ -617,6 +592,7 @@
 
 #define TM0S2_PITCH_SHIFT               21
 #define TM0S2_CUBE_FACE_ENA_SHIFT       15
+#define TM0S2_CUBE_FACE_ENA_MASK        (1<<15)
 #define TM0S2_MAP_FORMAT                (1<<14)
 #define TM0S2_VERTICAL_LINE_STRIDE      (1<<13)
 #define TM0S2_VERITCAL_LINE_STRIDE_OFF  (1<<12)