i965/miptree: Check tex image allocation failures

[mesa.git] / src / mesa / drivers / dri / i915 / i915_context.h

diff --git a/src/mesa/drivers/dri/i915/i915_context.h b/src/mesa/drivers/dri/i915/i915_context.h
index fa58ecb816567e5b1647b68f0fc499212e192b3e..4e68d1193ca61eb29b9d3806eb49548a2fcea6c7 100644 (file)
--- a/src/mesa/drivers/dri/i915/i915_context.h
+++ b/src/mesa/drivers/dri/i915/i915_context.h
@@ -79,12 +79,13 @@
 #define I915_CTXREG_STATE4             0
 #define I915_CTXREG_LI                 1
 #define I915_CTXREG_LIS2               2
-#define I915_CTXREG_LIS4               3
-#define I915_CTXREG_LIS5               4
-#define I915_CTXREG_LIS6               5
-#define I915_CTXREG_BF_STENCIL_OPS     6
-#define I915_CTXREG_BF_STENCIL_MASKS   7
-#define I915_CTX_SETUP_SIZE            8
+#define I915_CTXREG_LIS3               3
+#define I915_CTXREG_LIS4               4
+#define I915_CTXREG_LIS5               5
+#define I915_CTXREG_LIS6               6
+#define I915_CTXREG_BF_STENCIL_OPS     7
+#define I915_CTXREG_BF_STENCIL_MASKS   8
+#define I915_CTX_SETUP_SIZE            9
 
 #define I915_BLENDREG_IAB              0
 #define I915_BLENDREG_BLENDCOLOR0      1
@@ -115,6 +116,9 @@ enum {
    I915_RASTER_RULES_SETUP_SIZE,
 };
 
+#define I915_TEX_UNITS 8
+#define I915_WPOS_TEX_INVALID 0xff
+
 #define I915_MAX_CONSTANT      32
 #define I915_CONSTANT_SIZE     (2+(4*I915_MAX_CONSTANT))
 
@@ -138,7 +142,7 @@ enum {
  */
 struct i915_fragment_program
 {
-   struct gl_fragment_program FragProg;
+   struct gl_program FragProg;
 
    bool translated;
    bool params_uptodate;
@@ -194,7 +198,8 @@ struct i915_fragment_program
 
    /* Helpers for i915_fragprog.c:
     */
-   GLuint wpos_tex;
+   uint8_t texcoord_mapping[I915_TEX_UNITS];
+   uint8_t wpos_tex;
    bool depth_written;
 
    struct
@@ -205,15 +210,6 @@ struct i915_fragment_program
    GLuint nr_params;
 };
 
-
-
-
-
-
-
-#define I915_TEX_UNITS 8
-
-
 struct i915_hw_state
 {
    GLuint Ctx[I915_CTX_SETUP_SIZE];