fix up radeon span functions using latest r200 code from Brian,

[mesa.git] / src / mesa / drivers / dri / i915 / i915_fragprog.c

diff --git a/src/mesa/drivers/dri/i915/i915_fragprog.c b/src/mesa/drivers/dri/i915/i915_fragprog.c
index 962ff45e89a00f74593898db46d8d6826927de1a..77a72d61824eeb5efba2b265ba59a948c9dfbd68 100644 (file)
--- a/src/mesa/drivers/dri/i915/i915_fragprog.c
+++ b/src/mesa/drivers/dri/i915/i915_fragprog.c
@@ -145,7 +145,11 @@ static GLuint src_vector( struct i915_fragment_program *p,
                 GET_SWZ(source->Swizzle, 3));
 
    if (source->NegateBase)
-      src = negate( src, 1,1,1,1 );
+      src = negate( src, 
+                   GET_BIT(source->NegateBase, 0),
+                   GET_BIT(source->NegateBase, 1),
+                   GET_BIT(source->NegateBase, 2),
+                   GET_BIT(source->NegateBase, 3));
 
    return src;
 }
@@ -245,7 +249,7 @@ do {                                                                        \
  */
 static void upload_program( struct i915_fragment_program *p )
 {
-   const struct fragment_program *program = p->ctx->FragmentProgram.Current;
+   const struct fragment_program *program = p->ctx->FragmentProgram._Current;
    const struct fp_instruction *inst = program->Instructions;
 
 /*    _mesa_debug_fp_inst(program->Base.NumInstructions, inst); */
@@ -788,7 +792,7 @@ static void check_wpos( struct i915_fragment_program *p )
    GLuint inputs = p->FragProg.InputsRead;
    GLint i;
 
-   p->wpos_tex = 0;
+   p->wpos_tex = -1;
 
    for (i = 0; i < p->ctx->Const.MaxTextureCoordUnits; i++) {
       if (inputs & FRAG_BIT_TEX(i)) 
@@ -949,7 +953,7 @@ void i915ValidateFragmentProgram( i915ContextPtr i915 )
    struct vertex_buffer *VB = &tnl->vb;
 
    struct i915_fragment_program *p = 
-      (struct i915_fragment_program *)ctx->FragmentProgram.Current;
+      (struct i915_fragment_program *)ctx->FragmentProgram._Current;
 
    GLuint inputsRead = p->FragProg.InputsRead;
    GLuint s4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_VFMT_MASK;
@@ -981,15 +985,27 @@ void i915ValidateFragmentProgram( i915ContextPtr i915 )
       EMIT_ATTR( _TNL_ATTRIB_COLOR0, EMIT_4UB_4F_BGRA, S4_VFMT_COLOR, 4 );
    }
    
-   if (inputsRead & FRAG_BIT_COL1) {
-      intel->specoffset = offset / 4;
-      EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_3UB_3F_BGR, S4_VFMT_SPEC_FOG, 3 );
-      EMIT_PAD( 1 );
+   if ((inputsRead & (FRAG_BIT_COL1|FRAG_BIT_FOGC)) || 
+       i915->vertex_fog != I915_FOG_NONE) {
+
+      if (inputsRead & FRAG_BIT_COL1) {
+        intel->specoffset = offset / 4;
+        EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_3UB_3F_BGR, S4_VFMT_SPEC_FOG, 3 );
+      }
+      else
+        EMIT_PAD(3);
+
+      if ((inputsRead & FRAG_BIT_FOGC) || i915->vertex_fog != I915_FOG_NONE) 
+        EMIT_ATTR( _TNL_ATTRIB_FOG, EMIT_1UB_1F, S4_VFMT_SPEC_FOG, 1 );
+      else
+        EMIT_PAD( 1 );
    }
 
-   if (inputsRead & FRAG_BIT_FOGC) {
+#if 0
+   if ((inputsRead & FRAG_BIT_FOGC) || i915->vertex_fog != I915_FOG_NONE) {
       EMIT_ATTR( _TNL_ATTRIB_FOG, EMIT_1F, S4_VFMT_FOG_PARAM, 4 );
    }
+#endif
 
    for (i = 0; i < p->ctx->Const.MaxTextureCoordUnits; i++) {
       if (inputsRead & FRAG_BIT_TEX(i)) {