i965: Re-enable fast color clears for GEN11.

[mesa.git] / src / mesa / drivers / dri / i915 / intel_batchbuffer.c

diff --git a/src/mesa/drivers/dri/i915/intel_batchbuffer.c b/src/mesa/drivers/dri/i915/intel_batchbuffer.c
index 6ed2618dfb7f2f88dba4b98cdaf4da67849f391e..e0f14a43063db015e00f175553e564248b52769b 100644 (file)
--- a/src/mesa/drivers/dri/i915/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i915/intel_batchbuffer.c
@@ -1,6 +1,6 @@
 /**************************************************************************
  * 
- * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * Copyright 2006 VMware, Inc.
  * All Rights Reserved.
  * 
  * Permission is hereby granted, free of charge, to any person obtaining a
@@ -18,7 +18,7 @@
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
@@ -57,9 +57,7 @@ intel_batchbuffer_reset(struct intel_context *intel)
                                        intel->maxBatchSize, 4096);
 
    intel->batch.reserved_space = BATCH_RESERVED;
-   intel->batch.state_batch_offset = intel->batch.bo->size;
    intel->batch.used = 0;
-   intel->batch.needs_sol_reset = false;
 }
 
 void
@@ -119,28 +117,13 @@ do_flush_locked(struct intel_context *intel)
    int ret = 0;
 
    ret = drm_intel_bo_subdata(batch->bo, 0, 4*batch->used, batch->map);
-   if (ret == 0 && batch->state_batch_offset != batch->bo->size) {
-      ret = drm_intel_bo_subdata(batch->bo,
-                                 batch->state_batch_offset,
-                                 batch->bo->size - batch->state_batch_offset,
-                                 (char *)batch->map + batch->state_batch_offset);
-   }
 
    if (!intel->intelScreen->no_hw) {
-      int flags = I915_EXEC_RENDER;
-      if (batch->needs_sol_reset)
-        flags |= I915_EXEC_GEN7_SOL_RESET;
-
       if (ret == 0) {
          if (unlikely(INTEL_DEBUG & DEBUG_AUB) && intel->vtbl.annotate_aub)
             intel->vtbl.annotate_aub(intel);
-        if (intel->hw_ctx == NULL || batch->is_blit) {
-           ret = drm_intel_bo_mrb_exec(batch->bo, 4 * batch->used, NULL, 0, 0,
-                                       flags);
-        } else {
-           ret = drm_intel_gem_bo_context_exec(batch->bo, intel->hw_ctx,
-                                               4 * batch->used, flags);
-        }
+         ret = drm_intel_bo_mrb_exec(batch->bo, 4 * batch->used, NULL, 0, 0,
+                                     I915_EXEC_RENDER);
       }
    }
 
@@ -259,11 +242,11 @@ intel_batchbuffer_emit_reloc_fenced(struct intel_context *intel,
 
 void
 intel_batchbuffer_data(struct intel_context *intel,
-                       const void *data, GLuint bytes, bool is_blit)
+                       const void *data, GLuint bytes)
 {
    assert((bytes & 3) == 0);
-   intel_batchbuffer_require_space(intel, bytes, is_blit);
-   __memcpy(intel->batch.map + intel->batch.used, data, bytes);
+   intel_batchbuffer_require_space(intel, bytes);
+   memcpy(intel->batch.map + intel->batch.used, data, bytes);
    intel->batch.used += bytes >> 2;
 }