#include "intel_fbo.h"
#include "i830_dri.h"
-#include "dri_bufpool.h"
+#include "dri_bufmgr.h"
#include "intel_regions.h"
#include "intel_batchbuffer.h"
return GL_FALSE;
}
+ if (intelScreen->third.handle) {
+ if (0)
+ _mesa_printf("Third 0x%08x ", intelScreen->third.handle);
+ if (drmMap(sPriv->fd,
+ intelScreen->third.handle,
+ intelScreen->third.size,
+ (drmAddress *) & intelScreen->third.map) != 0) {
+ intelUnmapScreenRegions(intelScreen);
+ return GL_FALSE;
+ }
+ }
+
if (0)
_mesa_printf("Depth 0x%08x ", intelScreen->depth.handle);
if (drmMap(sPriv->fd,
return GL_FALSE;
}
-#if 0
- _mesa_printf("TEX 0x%08x ", intelScreen->tex.handle);
- if (drmMap(sPriv->fd,
- intelScreen->tex.handle,
- intelScreen->tex.size,
- (drmAddress *) & intelScreen->tex.map) != 0) {
- intelUnmapScreenRegions(intelScreen);
- return GL_FALSE;
+ if (0)
+ _mesa_printf("TEX 0x%08x ", intelScreen->tex.handle);
+ if (intelScreen->tex.size != 0) {
+ if (drmMap(sPriv->fd,
+ intelScreen->tex.handle,
+ intelScreen->tex.size,
+ (drmAddress *) & intelScreen->tex.map) != 0) {
+ intelUnmapScreenRegions(intelScreen);
+ return GL_FALSE;
+ }
}
-#endif
+
if (0)
- printf("Mappings: front: %p back: %p depth: %p tex: %p\n",
+ printf("Mappings: front: %p back: %p third: %p depth: %p tex: %p\n",
intelScreen->front.map,
- intelScreen->back.map,
+ intelScreen->back.map, intelScreen->third.map,
intelScreen->depth.map, intelScreen->tex.map);
return GL_TRUE;
}
+/** Driver-specific fence emit implementation for the fake memory manager. */
+static unsigned int
+intel_fence_emit(void *private)
+{
+ intelScreenPrivate *intelScreen = (intelScreenPrivate *)private;
+ unsigned int fence;
+
+ /* XXX: Need to emit a flush, if we haven't already (at least with the
+ * current batchbuffer implementation, we have).
+ */
+
+ fence = intelEmitIrqLocked(intelScreen);
+
+ return fence;
+}
+
+/** Driver-specific fence wait implementation for the fake memory manager. */
+static int
+intel_fence_wait(void *private, unsigned int cookie)
+{
+ intelScreenPrivate *intelScreen = (intelScreenPrivate *)private;
+
+ intelWaitIrq(intelScreen, cookie);
+
+ return 0;
+}
static struct intel_region *
intel_recreate_static(intelScreenPrivate *intelScreen,
intelScreen->back.pitch / intelScreen->cpp,
intelScreen->height);
+ if (intelScreen->third.handle) {
+ intelScreen->third_region =
+ intel_recreate_static(intelScreen,
+ intelScreen->third_region,
+ DRM_BO_FLAG_MEM_TT,
+ intelScreen->third.offset,
+ intelScreen->third.map,
+ intelScreen->cpp,
+ intelScreen->third.pitch / intelScreen->cpp,
+ intelScreen->height);
+ }
+
/* Still assuming front.cpp == depth.cpp
*/
intelScreen->depth_region =
#endif
intelScreen->back.map = NULL;
}
+ if (intelScreen->third.map) {
+#if REALLY_UNMAP
+ if (drmUnmap(intelScreen->third.map, intelScreen->third.size) != 0)
+ printf("drmUnmap third failed!\n");
+#endif
+ intelScreen->third.map = NULL;
+ }
if (intelScreen->depth.map) {
#if REALLY_UNMAP
drmUnmap(intelScreen->depth.map, intelScreen->depth.size);
intelScreen->back.handle = sarea->back_handle;
intelScreen->back.size = sarea->back_size;
+ if (intelScreen->driScrnPriv->ddxMinor >= 8) {
+ intelScreen->third.offset = sarea->third_offset;
+ intelScreen->third.pitch = sarea->pitch * intelScreen->cpp;
+ intelScreen->third.handle = sarea->third_handle;
+ intelScreen->third.size = sarea->third_size;
+ }
+
intelScreen->depth.offset = sarea->depth_offset;
intelScreen->depth.pitch = sarea->pitch * intelScreen->cpp;
intelScreen->depth.handle = sarea->depth_handle;
intelScreenPrivate *intelScreen;
I830DRIPtr gDRIPriv = (I830DRIPtr) sPriv->pDevPriv;
drmI830Sarea *sarea;
- unsigned batchPoolSize = 1024*1024;
PFNGLXSCRENABLEEXTENSIONPROC glx_enable_extension =
(PFNGLXSCRENABLEEXTENSIONPROC) (*dri_interface->
sarea = (drmI830Sarea *)
(((GLubyte *) sPriv->pSAREA) + intelScreen->sarea_priv_offset);
- intelScreen->maxBatchSize = BATCH_SZ;
intelScreen->deviceID = gDRIPriv->deviceID;
if (intelScreen->deviceID == PCI_CHIP_I865_G)
intelScreen->maxBatchSize = 4096;
- batchPoolSize /= intelScreen->maxBatchSize;
+ else
+ intelScreen->maxBatchSize = BATCH_SZ;
intelScreen->mem = gDRIPriv->mem;
intelScreen->cpp = gDRIPriv->cpp;
return GL_FALSE;
}
-#if 0
-
- /*
- * FIXME: Remove this code and its references.
- */
-
- intelScreen->tex.offset = gDRIPriv->textureOffset;
- intelScreen->logTextureGranularity = gDRIPriv->logTextureGranularity;
- intelScreen->tex.handle = gDRIPriv->textures;
- intelScreen->tex.size = gDRIPriv->textureSize;
-
-#else
- intelScreen->tex.offset = 0;
- intelScreen->logTextureGranularity = 0;
- intelScreen->tex.handle = 0;
- intelScreen->tex.size = 0;
-#endif
-
intelScreen->sarea_priv_offset = gDRIPriv->sarea_priv_offset;
if (0)
(*glx_enable_extension) (psc, "GLX_SGI_make_current_read");
}
- intelScreen->regionPool = driDRMPoolInit(sPriv->fd);
-
- if (!intelScreen->regionPool)
- return GL_FALSE;
-
- intelScreen->staticPool = driDRMStaticPoolInit(sPriv->fd);
-
- if (!intelScreen->staticPool)
- return GL_FALSE;
-
- intelScreen->texPool = intelScreen->regionPool;
-
- intelScreen->batchPool = driBatchPoolInit(sPriv->fd,
- DRM_BO_FLAG_EXE |
- DRM_BO_FLAG_MEM_TT |
- DRM_BO_FLAG_MEM_LOCAL,
- intelScreen->maxBatchSize,
- batchPoolSize, 5);
- if (!intelScreen->batchPool) {
- fprintf(stderr, "Failed to initialize batch pool - possible incorrect agpgart installed\n");
- return GL_FALSE;
+ intelScreen->bufmgr = dri_bufmgr_ttm_init(sPriv->fd,
+ DRM_FENCE_TYPE_EXE,
+ DRM_FENCE_TYPE_EXE |
+ DRM_I915_FENCE_TYPE_RW);
+ if (intelScreen->bufmgr == NULL) {
+ if (intelScreen->tex.size == 0) {
+ fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
+ __func__, __LINE__);
+ return GL_FALSE;
+ }
+ intelScreen->bufmgr = dri_bufmgr_fake_init(intelScreen->tex.offset,
+ intelScreen->tex.map,
+ intelScreen->tex.size,
+ intel_fence_emit,
+ intel_fence_wait,
+ intelScreen);
}
intel_recreate_static_regions(intelScreen);
intelUnmapScreenRegions(intelScreen);
- driPoolTakeDown(intelScreen->regionPool);
- driPoolTakeDown(intelScreen->staticPool);
- driPoolTakeDown(intelScreen->batchPool);
+ dri_bufmgr_destroy(intelScreen->bufmgr);
FREE(intelScreen);
sPriv->private = NULL;
}
mesaVis->depthBits != 24);
GLenum rgbFormat = (mesaVis->redBits == 5 ? GL_RGB5 : GL_RGBA8);
- struct gl_framebuffer *fb = _mesa_create_framebuffer(mesaVis);
+ struct intel_framebuffer *intel_fb = CALLOC_STRUCT(intel_framebuffer);
+
+ if (!intel_fb)
+ return GL_FALSE;
+
+ _mesa_initialize_framebuffer(&intel_fb->Base, mesaVis);
/* setup the hardware-based renderbuffers */
{
- struct intel_renderbuffer *frontRb
+ intel_fb->color_rb[0]
= intel_create_renderbuffer(rgbFormat,
screen->width, screen->height,
screen->front.offset,
screen->front.pitch,
screen->cpp,
screen->front.map);
- intel_set_span_functions(&frontRb->Base);
- _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &frontRb->Base);
+ intel_set_span_functions(&intel_fb->color_rb[0]->Base);
+ _mesa_add_renderbuffer(&intel_fb->Base, BUFFER_FRONT_LEFT,
+ &intel_fb->color_rb[0]->Base);
}
if (mesaVis->doubleBufferMode) {
- struct intel_renderbuffer *backRb
+ intel_fb->color_rb[1]
= intel_create_renderbuffer(rgbFormat,
screen->width, screen->height,
screen->back.offset,
screen->back.pitch,
screen->cpp,
screen->back.map);
- intel_set_span_functions(&backRb->Base);
- _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &backRb->Base);
+ intel_set_span_functions(&intel_fb->color_rb[1]->Base);
+ _mesa_add_renderbuffer(&intel_fb->Base, BUFFER_BACK_LEFT,
+ &intel_fb->color_rb[1]->Base);
+
+ if (screen->third.handle) {
+ struct gl_renderbuffer *tmp_rb = NULL;
+
+ intel_fb->color_rb[2]
+ = intel_create_renderbuffer(rgbFormat,
+ screen->width, screen->height,
+ screen->third.offset,
+ screen->third.pitch,
+ screen->cpp,
+ screen->third.map);
+ intel_set_span_functions(&intel_fb->color_rb[2]->Base);
+ _mesa_reference_renderbuffer(&tmp_rb, &intel_fb->color_rb[2]->Base);
+ }
}
if (mesaVis->depthBits == 24 && mesaVis->stencilBits == 8) {
screen->depth.map);
intel_set_span_functions(&depthStencilRb->Base);
/* note: bind RB to two attachment points */
- _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthStencilRb->Base);
- _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &depthStencilRb->Base);
+ _mesa_add_renderbuffer(&intel_fb->Base, BUFFER_DEPTH,
+ &depthStencilRb->Base);
+ _mesa_add_renderbuffer(&intel_fb->Base, BUFFER_STENCIL,
+ &depthStencilRb->Base);
}
else if (mesaVis->depthBits == 16) {
/* just 16-bit depth buffer, no hw stencil */
screen->cpp, /* 2! */
screen->depth.map);
intel_set_span_functions(&depthRb->Base);
- _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthRb->Base);
+ _mesa_add_renderbuffer(&intel_fb->Base, BUFFER_DEPTH, &depthRb->Base);
}
/* now add any/all software-based renderbuffers we may need */
- _mesa_add_soft_renderbuffers(fb, GL_FALSE, /* never sw color */
- GL_FALSE, /* never sw depth */
- swStencil, mesaVis->accumRedBits > 0, GL_FALSE, /* never sw alpha */
- GL_FALSE /* never sw aux */ );
- driDrawPriv->driverPrivate = (void *) fb;
-
- return (driDrawPriv->driverPrivate != NULL);
+ _mesa_add_soft_renderbuffers(&intel_fb->Base,
+ GL_FALSE, /* never sw color */
+ GL_FALSE, /* never sw depth */
+ swStencil, mesaVis->accumRedBits > 0,
+ GL_FALSE, /* never sw alpha */
+ GL_FALSE /* never sw aux */ );
+ driDrawPriv->driverPrivate = (void *) intel_fb;
+
+ return GL_TRUE;
}
}
static void
intelDestroyBuffer(__DRIdrawablePrivate * driDrawPriv)
{
- _mesa_destroy_framebuffer((GLframebuffer *) (driDrawPriv->driverPrivate));
+ _mesa_unreference_framebuffer((GLframebuffer **)(&(driDrawPriv->driverPrivate)));
}
static int
intelGetSwapInfo(__DRIdrawablePrivate * dPriv, __DRIswapInfo * sInfo)
{
- struct intel_context *intel;
+ struct intel_framebuffer *intel_fb;
- if ((dPriv == NULL) || (dPriv->driContextPriv == NULL)
- || (dPriv->driContextPriv->driverPrivate == NULL)
+ if ((dPriv == NULL) || (dPriv->driverPrivate == NULL)
|| (sInfo == NULL)) {
return -1;
}
- intel = dPriv->driContextPriv->driverPrivate;
- sInfo->swap_count = intel->swap_count;
- sInfo->swap_ust = intel->swap_ust;
- sInfo->swap_missed_count = intel->swap_missed_count;
+ intel_fb = dPriv->driverPrivate;
+ sInfo->swap_count = intel_fb->swap_count;
+ sInfo->swap_ust = intel_fb->swap_ust;
+ sInfo->swap_missed_count = intel_fb->swap_missed_count;
sInfo->swap_missed_usage = (sInfo->swap_missed_count != 0)
- ? driCalculateSwapUsage(dPriv, 0, intel->swap_missed_ust)
+ ? driCalculateSwapUsage(dPriv, 0, intel_fb->swap_missed_ust)
: 0.0;
return 0;
case PCI_CHIP_I915_GM:
case PCI_CHIP_I945_G:
case PCI_CHIP_I945_GM:
+ case PCI_CHIP_I945_GME:
+ case PCI_CHIP_G33_G:
+ case PCI_CHIP_Q35_G:
+ case PCI_CHIP_Q33_G:
return i915CreateContext(mesaVis, driContextPriv, sharedContextPrivate);
default:
.WaitForMSC = driWaitForMSC32,
.WaitForSBC = NULL,
.SwapBuffersMSC = NULL,
- .CopySubBuffer = intelCopySubBuffer
+ .CopySubBuffer = intelCopySubBuffer,
+ .setTexOffset = intelSetTexOffset,
};
__DRIscreenPrivate *psp;
static const __DRIversion ddx_expected = { 1, 5, 0 };
static const __DRIversion dri_expected = { 4, 0, 0 };
- static const __DRIversion drm_expected = { 1, 7, 0 };
+ static const __DRIversion drm_expected = { 1, 5, 0 };
dri_interface = interface;
ddx_version, dri_version, drm_version,
frame_buffer, pSAREA, fd,
internal_api_version, &intelAPI);
+
if (psp != NULL) {
I830DRIPtr dri_priv = (I830DRIPtr) psp->pDevPriv;
*driver_modes = intelFillInModes(dri_priv->cpp * 8,
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