intel: Add a batch flush between front-buffer downsample and X protocol.
[mesa.git] / src / mesa / drivers / dri / i965 / Makefile.sources
index 2783c544b2636f71df526d4a0bd8ac6725d33cff..290cd93a107dca665e351ebe5b833e29f7a96498 100644 (file)
@@ -24,9 +24,9 @@ i965_FILES = \
        intel_tex.c \
        intel_tex_copy.c \
        intel_tex_image.c \
-       intel_tex_layout.c \
        intel_tex_subimage.c \
        intel_tex_validate.c \
+       intel_upload.c \
        brw_blorp.cpp \
        brw_blorp_blit.cpp \
        brw_blorp_clear.cpp \
@@ -48,7 +48,6 @@ i965_FILES = \
        brw_draw_upload.c \
        brw_eu.c \
        brw_eu_compact.c \
-       brw_eu_debug.c \
        brw_eu_emit.c \
        brw_eu_util.c \
        brw_fs.cpp \
@@ -64,8 +63,10 @@ i965_FILES = \
        brw_gs.c \
        brw_gs_emit.c \
        brw_gs_state.c \
+       brw_interpolation_map.c \
        brw_lower_texture_gradients.cpp \
        brw_misc_state.c \
+       brw_object_purgeable.c \
        brw_program.c \
        brw_primitive_restart.c \
        brw_queryobj.c \
@@ -78,6 +79,7 @@ i965_FILES = \
        brw_state_cache.c \
        brw_state_dump.c \
        brw_state_upload.c \
+       brw_surface_formats.c \
        brw_tex.c \
        brw_tex_layout.c \
        brw_urb.c \
@@ -85,6 +87,7 @@ i965_FILES = \
        brw_vec4.cpp \
        brw_vec4_copy_propagation.cpp \
        brw_vec4_emit.cpp \
+       brw_vec4_gs_visitor.cpp \
        brw_vec4_live_variables.cpp \
        brw_vec4_reg_allocate.cpp \
        brw_vec4_visitor.cpp \