i965: Implement GenerateMipmap directly, rather than using Meta.

[mesa.git] / src / mesa / drivers / dri / i965 / Makefile.sources

diff --git a/src/mesa/drivers/dri/i965/Makefile.sources b/src/mesa/drivers/dri/i965/Makefile.sources
index aef1a7af3573b95ed2e827e5639a96adf535a804..2f349aa07ab0107fdfca3409b3600095815bdf98 100644 (file)
--- a/src/mesa/drivers/dri/i965/Makefile.sources
+++ b/src/mesa/drivers/dri/i965/Makefile.sources
@@ -4,16 +4,8 @@ i965_FILES = \
        brw_blorp.h \
        brw_bufmgr.c \
        brw_bufmgr.h \
-       brw_cc.c \
        brw_clear.c \
        brw_clip.c \
-       brw_clip.h \
-       brw_clip_line.c \
-       brw_clip_point.c \
-       brw_clip_state.c \
-       brw_clip_tri.c \
-       brw_clip_unfilled.c \
-       brw_clip_util.c \
        brw_compute.c \
        brw_conditional_render.c \
        brw_context.c \
@@ -22,6 +14,7 @@ i965_FILES = \
        brw_cs.h \
        brw_curbe.c \
        brw_defines.h \
+       brw_disk_cache.c \
        brw_draw.c \
        brw_draw.h \
        brw_draw_upload.c \
@@ -29,9 +22,9 @@ i965_FILES = \
        brw_ff_gs_emit.c \
        brw_ff_gs.h \
        brw_formatquery.c \
+       brw_generate_mipmap.c \
        brw_gs.c \
        brw_gs.h \
-       brw_gs_state.c \
        brw_gs_surface_state.c \
        brw_link.cpp \
        brw_meta_util.c \
@@ -41,20 +34,17 @@ i965_FILES = \
        brw_nir_uniforms.cpp \
        brw_object_purgeable.c \
        brw_pipe_control.c \
+       brw_pipe_control.h \
        brw_performance_query.h \
        brw_performance_query.c \
        brw_program.c \
        brw_program.h \
+       brw_program_binary.c \
        brw_program_cache.c \
        brw_primitive_restart.c \
        brw_queryobj.c \
        brw_reset.c \
-       brw_sampler_state.c \
        brw_sf.c \
-       brw_sf_emit.c \
-       brw_sf.h \
-       brw_sf_state.c \
-       brw_state_batch.c \
        brw_state.h \
        brw_state_upload.c \
        brw_structs.h \
@@ -64,62 +54,30 @@ i965_FILES = \
        brw_tcs_surface_state.c \
        brw_tes.c \
        brw_tes_surface_state.c \
-       brw_tex_layout.c \
        brw_urb.c \
        brw_util.c \
        brw_util.h \
        brw_vs.c \
        brw_vs.h \
-       brw_vs_state.c \
        brw_vs_surface_state.c \
        brw_wm.c \
        brw_wm.h \
-       brw_wm_state.c \
        brw_wm_surface_state.c \
-       gen6_cc.c \
+       gen4_blorp_exec.h \
        gen6_clip_state.c \
        gen6_constant_state.c \
        gen6_depth_state.c \
-       gen6_depthstencil.c \
-       gen6_gs_state.c \
        gen6_multisample_state.c \
        gen6_queryobj.c \
        gen6_sampler_state.c \
-       gen6_scissor_state.c \
-       gen6_sf_state.c \
        gen6_sol.c \
        gen6_urb.c \
-       gen6_viewport_state.c \
-       gen6_vs_state.c \
-       gen6_wm_state.c \
-       gen7_cs_state.c \
-       gen7_ds_state.c \
-       gen7_gs_state.c \
-       gen7_hs_state.c \
        gen7_l3_state.c \
        gen7_misc_state.c \
-       gen7_sf_state.c \
        gen7_sol_state.c \
-       gen7_te_state.c \
        gen7_urb.c \
-       gen7_viewport_state.c \
-       gen7_vs_state.c \
-       gen7_wm_state.c \
-       gen7_wm_surface_state.c \
-       gen8_blend_state.c \
        gen8_depth_state.c \
-       gen8_draw_upload.c \
-       gen8_ds_state.c \
-       gen8_gs_state.c \
-       gen8_hs_state.c \
        gen8_multisample_state.c \
-       gen8_ps_state.c \
-       gen8_sf_state.c \
-       gen8_sol_state.c \
-       gen8_surface_state.c \
-       gen8_viewport_state.c \
-       gen8_vs_state.c \
-       gen8_wm_depth_stencil.c \
        hsw_queryobj.c \
        hsw_sol.c \
        intel_batchbuffer.c \
@@ -143,8 +101,6 @@ i965_FILES = \
        intel_pixel_draw.c \
        intel_pixel.h \
        intel_pixel_read.c \
-       intel_resolve_map.c \
-       intel_resolve_map.h \
        intel_screen.c \
        intel_screen.h \
        intel_state.c \
@@ -153,28 +109,74 @@ i965_FILES = \
        intel_tex.h \
        intel_tex_image.c \
        intel_tex_obj.h \
-       intel_tex_subimage.c \
        intel_tex_validate.c \
        intel_tiled_memcpy.c \
        intel_tiled_memcpy.h \
        intel_upload.c \
        libdrm_macros.h
 
+i965_gen4_FILES = \
+       genX_blorp_exec.c \
+       genX_state_upload.c
+
+i965_gen45_FILES = \
+       genX_blorp_exec.c \
+       genX_state_upload.c
+
+i965_gen5_FILES = \
+       genX_blorp_exec.c \
+       genX_state_upload.c
+
 i965_gen6_FILES = \
-       genX_blorp_exec.c
+       genX_blorp_exec.c \
+       genX_state_upload.c
 
 i965_gen7_FILES = \
-       genX_blorp_exec.c
+       genX_blorp_exec.c \
+       genX_state_upload.c
 
 i965_gen75_FILES = \
-       genX_blorp_exec.c
+       genX_blorp_exec.c \
+       genX_state_upload.c
 
 i965_gen8_FILES = \
-       genX_blorp_exec.c
+       genX_blorp_exec.c \
+       genX_state_upload.c
 
 i965_gen9_FILES = \
-       genX_blorp_exec.c
+       genX_blorp_exec.c \
+       genX_state_upload.c
+
+i965_gen10_FILES = \
+       genX_blorp_exec.c \
+       genX_state_upload.c
+
+i965_gen11_FILES = \
+       genX_blorp_exec.c \
+       genX_state_upload.c
 
 i965_oa_GENERATED_FILES = \
        brw_oa_hsw.h \
-       brw_oa_hsw.c
+       brw_oa_hsw.c \
+       brw_oa_bdw.h \
+       brw_oa_bdw.c \
+       brw_oa_chv.h \
+       brw_oa_chv.c \
+       brw_oa_sklgt2.h \
+       brw_oa_sklgt2.c \
+       brw_oa_sklgt3.h \
+       brw_oa_sklgt3.c \
+       brw_oa_sklgt4.h \
+       brw_oa_sklgt4.c \
+       brw_oa_bxt.h \
+       brw_oa_bxt.c \
+       brw_oa_kblgt2.h \
+       brw_oa_kblgt2.c \
+       brw_oa_kblgt3.h \
+       brw_oa_kblgt3.c \
+       brw_oa_glk.h \
+       brw_oa_glk.c \
+       brw_oa_cflgt2.h \
+       brw_oa_cflgt2.c \
+       brw_oa_cflgt3.h \
+       brw_oa_cflgt3.c