i965/vec4: Don't lose the force_writemask_all flag during CSE.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_binding_tables.c

diff --git a/src/mesa/drivers/dri/i965/brw_binding_tables.c b/src/mesa/drivers/dri/i965/brw_binding_tables.c
index 7ffd7b2e5d191c868952b407d36542c46aa68ac6..08e419144283ffb976de3ea892382e2ad761f9a0 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_binding_tables.c
+++ b/src/mesa/drivers/dri/i965/brw_binding_tables.c
@@ -68,9 +68,11 @@ brw_upload_binding_table(struct brw_context *brw,
    } else {
       /* Upload a new binding table. */
       if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
-         brw->vtbl.create_raw_surface(
-            brw, brw->shader_time.bo, 0, brw->shader_time.bo->size,
-            &stage_state->surf_offset[prog_data->binding_table.shader_time_start], true);
+         brw->vtbl.emit_buffer_surface_state(
+            brw, &stage_state->surf_offset[
+                    prog_data->binding_table.shader_time_start],
+            brw->shader_time.bo, 0, BRW_SURFACEFORMAT_RAW,
+            brw->shader_time.bo->size, 1, true);
       }
 
       uint32_t *bind = brw_state_batch(brw, AUB_TRACE_BINDING_TABLE,
@@ -195,7 +197,6 @@ const struct brw_tracked_state brw_binding_table_pointers = {
              BRW_NEW_PS_BINDING_TABLE |
              BRW_NEW_STATE_BASE_ADDRESS |
              BRW_NEW_VS_BINDING_TABLE,
-      .cache = 0,
    },
    .emit = gen4_upload_binding_table_pointers,
 };
@@ -232,7 +233,6 @@ const struct brw_tracked_state gen6_binding_table_pointers = {
              BRW_NEW_PS_BINDING_TABLE |
              BRW_NEW_STATE_BASE_ADDRESS |
              BRW_NEW_VS_BINDING_TABLE,
-      .cache = 0,
    },
    .emit = gen6_upload_binding_table_pointers,
 };