#include "brw_state.h"
#include "intel_batchbuffer.h"
-static const GLuint stage_to_bt_edit[MESA_SHADER_FRAGMENT + 1] = {
- _3DSTATE_BINDING_TABLE_EDIT_VS,
- _3DSTATE_BINDING_TABLE_EDIT_GS,
- _3DSTATE_BINDING_TABLE_EDIT_PS,
+static const GLuint stage_to_bt_edit[] = {
+ [MESA_SHADER_VERTEX] = _3DSTATE_BINDING_TABLE_EDIT_VS,
+ [MESA_SHADER_GEOMETRY] = _3DSTATE_BINDING_TABLE_EDIT_GS,
+ [MESA_SHADER_FRAGMENT] = _3DSTATE_BINDING_TABLE_EDIT_PS,
};
+static uint32_t
+reserve_hw_bt_space(struct brw_context *brw, unsigned bytes)
+{
+ /* From the Broadwell PRM, Volume 16, "Workarounds",
+ * WaStateBindingTableOverfetch:
+ * "HW over-fetches two cache lines of binding table indices. When
+ * using the resource streamer, SW needs to pad binding table pointer
+ * updates with an additional two cache lines."
+ *
+ * Cache lines are 64 bytes, so we subtract 128 bytes from the size of
+ * the binding table pool buffer.
+ */
+ if (brw->hw_bt_pool.next_offset + bytes >= brw->hw_bt_pool.bo->size - 128) {
+ gen7_reset_hw_bt_pool_offsets(brw);
+ }
+
+ uint32_t offset = brw->hw_bt_pool.next_offset;
+
+ /* From the Haswell PRM, Volume 2b: Command Reference: Instructions,
+ * 3DSTATE_BINDING_TABLE_POINTERS_xS:
+ *
+ * "If HW Binding Table is enabled, the offset is relative to the
+ * Binding Table Pool Base Address and the alignment is 64 bytes."
+ */
+ brw->hw_bt_pool.next_offset += ALIGN(bytes, 64);
+
+ return offset;
+}
+
/**
* Upload a shader stage's binding table as indirect state.
*
void
brw_upload_binding_table(struct brw_context *brw,
uint32_t packet_name,
- GLbitfield brw_new_binding_table,
const struct brw_stage_prog_data *prog_data,
struct brw_stage_state *stage_state)
{
brw->shader_time.bo, 0, BRW_SURFACEFORMAT_RAW,
brw->shader_time.bo->size, 1, true);
}
-
- uint32_t *bind = brw_state_batch(brw, AUB_TRACE_BINDING_TABLE,
- prog_data->binding_table.size_bytes, 32,
- &stage_state->bind_bo_offset);
-
- /* BRW_NEW_SURFACES and BRW_NEW_*_CONSTBUF */
- memcpy(bind, stage_state->surf_offset,
- prog_data->binding_table.size_bytes);
+ /* When RS is enabled use hw-binding table uploads, otherwise fallback to
+ * software-uploads.
+ */
+ if (brw->use_resource_streamer) {
+ gen7_update_binding_table_from_array(brw, stage_state->stage,
+ stage_state->surf_offset,
+ prog_data->binding_table
+ .size_bytes / 4);
+ } else {
+ uint32_t *bind = brw_state_batch(brw, AUB_TRACE_BINDING_TABLE,
+ prog_data->binding_table.size_bytes,
+ 32,
+ &stage_state->bind_bo_offset);
+
+ /* BRW_NEW_SURFACES and BRW_NEW_*_CONSTBUF */
+ memcpy(bind, stage_state->surf_offset,
+ prog_data->binding_table.size_bytes);
+ }
}
- brw->ctx.NewDriverState |= brw_new_binding_table;
+ brw->ctx.NewDriverState |= BRW_NEW_BINDING_TABLE_POINTERS;
if (brw->gen >= 7) {
+ if (brw->use_resource_streamer) {
+ stage_state->bind_bo_offset =
+ reserve_hw_bt_space(brw, prog_data->binding_table.size_bytes);
+ }
BEGIN_BATCH(2);
OUT_BATCH(packet_name << 16 | (2 - 2));
- OUT_BATCH(stage_state->bind_bo_offset);
+ /* Align SurfaceStateOffset[16:6] format to [15:5] PS Binding Table field
+ * when hw-generated binding table is enabled.
+ */
+ OUT_BATCH(brw->use_resource_streamer ?
+ (stage_state->bind_bo_offset >> 1) :
+ stage_state->bind_bo_offset);
ADVANCE_BATCH();
}
}
const struct brw_stage_prog_data *prog_data = brw->vs.base.prog_data;
brw_upload_binding_table(brw,
_3DSTATE_BINDING_TABLE_POINTERS_VS,
- BRW_NEW_VS_BINDING_TABLE, prog_data,
+ prog_data,
&brw->vs.base);
}
.dirty = {
.mesa = 0,
.brw = BRW_NEW_BATCH |
+ BRW_NEW_BLORP |
BRW_NEW_VS_CONSTBUF |
BRW_NEW_VS_PROG_DATA |
BRW_NEW_SURFACES,
const struct brw_stage_prog_data *prog_data = brw->wm.base.prog_data;
brw_upload_binding_table(brw,
_3DSTATE_BINDING_TABLE_POINTERS_PS,
- BRW_NEW_PS_BINDING_TABLE, prog_data,
+ prog_data,
&brw->wm.base);
}
.dirty = {
.mesa = 0,
.brw = BRW_NEW_BATCH |
+ BRW_NEW_BLORP |
BRW_NEW_FS_PROG_DATA |
BRW_NEW_SURFACES,
},
.emit = brw_upload_wm_binding_table,
};
+/** Upload the TCS binding table (if tessellation stages are active). */
+static void
+brw_tcs_upload_binding_table(struct brw_context *brw)
+{
+ /* Skip if the tessellation stages are disabled. */
+ if (brw->tess_eval_program == NULL)
+ return;
+
+ /* BRW_NEW_TCS_PROG_DATA */
+ const struct brw_stage_prog_data *prog_data = brw->tcs.base.prog_data;
+ brw_upload_binding_table(brw,
+ _3DSTATE_BINDING_TABLE_POINTERS_HS,
+ prog_data,
+ &brw->tcs.base);
+}
+
+const struct brw_tracked_state brw_tcs_binding_table = {
+ .dirty = {
+ .mesa = 0,
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_BLORP |
+ BRW_NEW_DEFAULT_TESS_LEVELS |
+ BRW_NEW_SURFACES |
+ BRW_NEW_TCS_CONSTBUF |
+ BRW_NEW_TCS_PROG_DATA,
+ },
+ .emit = brw_tcs_upload_binding_table,
+};
+
+/** Upload the TES binding table (if TES is active). */
+static void
+brw_tes_upload_binding_table(struct brw_context *brw)
+{
+ /* If there's no TES, skip changing anything. */
+ if (brw->tess_eval_program == NULL)
+ return;
+
+ /* BRW_NEW_TES_PROG_DATA */
+ const struct brw_stage_prog_data *prog_data = brw->tes.base.prog_data;
+ brw_upload_binding_table(brw,
+ _3DSTATE_BINDING_TABLE_POINTERS_DS,
+ prog_data,
+ &brw->tes.base);
+}
+
+const struct brw_tracked_state brw_tes_binding_table = {
+ .dirty = {
+ .mesa = 0,
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_BLORP |
+ BRW_NEW_SURFACES |
+ BRW_NEW_TES_CONSTBUF |
+ BRW_NEW_TES_PROG_DATA,
+ },
+ .emit = brw_tes_upload_binding_table,
+};
+
/** Upload the GS binding table (if GS is active). */
static void
brw_gs_upload_binding_table(struct brw_context *brw)
const struct brw_stage_prog_data *prog_data = brw->gs.base.prog_data;
brw_upload_binding_table(brw,
_3DSTATE_BINDING_TABLE_POINTERS_GS,
- BRW_NEW_GS_BINDING_TABLE, prog_data,
+ prog_data,
&brw->gs.base);
}
.dirty = {
.mesa = 0,
.brw = BRW_NEW_BATCH |
+ BRW_NEW_BLORP |
BRW_NEW_GS_CONSTBUF |
BRW_NEW_GS_PROG_DATA |
BRW_NEW_SURFACES,
uint32_t index,
uint32_t surf_offset)
{
- assert(stage <= MESA_SHADER_FRAGMENT);
+ assert(stage < ARRAY_SIZE(stage_to_bt_edit));
+ assert(stage_to_bt_edit[stage]);
uint32_t dw2 = SET_FIELD(index, BRW_BINDING_TABLE_INDEX) |
(brw->gen >= 8 ? GEN8_SURFACE_STATE_EDIT(surf_offset) :
int num_surfaces)
{
uint32_t dw2 = 0;
- assert(stage <= MESA_SHADER_FRAGMENT);
+
+ assert(stage < ARRAY_SIZE(stage_to_bt_edit));
+ assert(stage_to_bt_edit[stage]);
BEGIN_BATCH(num_surfaces + 2);
OUT_BATCH(stage_to_bt_edit[stage] << 16 | num_surfaces);
const struct brw_tracked_state gen7_hw_binding_tables = {
.dirty = {
.mesa = 0,
- .brw = BRW_NEW_BATCH,
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_BLORP,
},
.emit = gen7_enable_hw_binding_tables
};
.dirty = {
.mesa = 0,
.brw = BRW_NEW_BATCH |
- BRW_NEW_GS_BINDING_TABLE |
- BRW_NEW_PS_BINDING_TABLE |
- BRW_NEW_STATE_BASE_ADDRESS |
- BRW_NEW_VS_BINDING_TABLE,
+ BRW_NEW_BLORP |
+ BRW_NEW_BINDING_TABLE_POINTERS |
+ BRW_NEW_STATE_BASE_ADDRESS,
},
.emit = gen4_upload_binding_table_pointers,
};
.dirty = {
.mesa = 0,
.brw = BRW_NEW_BATCH |
- BRW_NEW_GS_BINDING_TABLE |
- BRW_NEW_PS_BINDING_TABLE |
- BRW_NEW_STATE_BASE_ADDRESS |
- BRW_NEW_VS_BINDING_TABLE,
+ BRW_NEW_BLORP |
+ BRW_NEW_BINDING_TABLE_POINTERS |
+ BRW_NEW_STATE_BASE_ADDRESS,
},
.emit = gen6_upload_binding_table_pointers,
};
projects / mesa.git / blobdiff