i965: Lift some restrictions on dma_buf EGLImages
[mesa.git] / src / mesa / drivers / dri / i965 / brw_binding_tables.c
index 9d15bac270e56662ebdae1eb18e833d64a71b2a8..459165a5aeb5d371d1cf10faa40cdb1885cce8b3 100644 (file)
  * This copies brw_stage_state::surf_offset[] into the indirect state section
  * of the batchbuffer (allocated by brw_state_batch()).
  */
-void
+static void
 brw_upload_binding_table(struct brw_context *brw,
+                         uint32_t packet_name,
                          GLbitfield brw_new_binding_table,
-                         struct brw_stage_state *stage_state,
-                         unsigned binding_table_entries,
-                         int shader_time_surf_index)
+                         struct brw_stage_state *stage_state)
 {
-   if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
-      gen7_create_shader_time_surface(brw, &stage_state->surf_offset[shader_time_surf_index]);
-   }
-
-   /* If there are no surfaces, skip making the binding table altogether. */
-   if (binding_table_entries == 0) {
-      if (stage_state->bind_bo_offset != 0) {
-         brw->state.dirty.brw |= brw_new_binding_table;
-         stage_state->bind_bo_offset = 0;
+   /* BRW_NEW_*_PROG_DATA */
+   struct brw_stage_prog_data *prog_data = stage_state->prog_data;
+
+   if (prog_data->binding_table.size_bytes == 0) {
+      /* There are no surfaces; skip making the binding table altogether. */
+      if (stage_state->bind_bo_offset == 0 && brw->gen < 9)
+         return;
+
+      stage_state->bind_bo_offset = 0;
+   } else {
+      /* Upload a new binding table. */
+      if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
+         brw->vtbl.emit_buffer_surface_state(
+            brw, &stage_state->surf_offset[
+                    prog_data->binding_table.shader_time_start],
+            brw->shader_time.bo, 0, BRW_SURFACEFORMAT_RAW,
+            brw->shader_time.bo->size, 1, true);
       }
-      return;
-   }
 
-   size_t table_size_in_bytes = binding_table_entries * sizeof(uint32_t);
+      uint32_t *bind = brw_state_batch(brw, AUB_TRACE_BINDING_TABLE,
+                                       prog_data->binding_table.size_bytes, 32,
+                                       &stage_state->bind_bo_offset);
 
-   uint32_t *bind = brw_state_batch(brw, AUB_TRACE_BINDING_TABLE,
-                                    table_size_in_bytes, 32,
-                                    &stage_state->bind_bo_offset);
+      /* BRW_NEW_SURFACES and BRW_NEW_*_CONSTBUF */
+      memcpy(bind, stage_state->surf_offset,
+             prog_data->binding_table.size_bytes);
+   }
 
-   /* BRW_NEW_SURFACES and BRW_NEW_*_CONSTBUF */
-   memcpy(bind, stage_state->surf_offset, table_size_in_bytes);
+   brw->ctx.NewDriverState |= brw_new_binding_table;
 
-   brw->state.dirty.brw |= brw_new_binding_table;
+   if (brw->gen >= 7) {
+      BEGIN_BATCH(2);
+      OUT_BATCH(packet_name << 16 | (2 - 2));
+      OUT_BATCH(stage_state->bind_bo_offset);
+      ADVANCE_BATCH();
+   }
 }
 
 /**
@@ -91,14 +103,9 @@ brw_upload_binding_table(struct brw_context *brw,
 static void
 brw_vs_upload_binding_table(struct brw_context *brw)
 {
-   struct brw_stage_state *stage_state = &brw->vs.base;
-   /* CACHE_NEW_VS_PROG */
-   const struct brw_vec4_prog_data *prog_data = &brw->vs.prog_data->base;
-
-   /* BRW_NEW_SURFACES and BRW_NEW_VS_CONSTBUF */
-   brw_upload_binding_table(brw, BRW_NEW_VS_BINDING_TABLE, stage_state,
-                            prog_data->binding_table_size,
-                            SURF_INDEX_VEC4_SHADER_TIME);
+   brw_upload_binding_table(brw,
+                            _3DSTATE_BINDING_TABLE_POINTERS_VS,
+                            BRW_NEW_VS_BINDING_TABLE, &brw->vs.base);
 }
 
 const struct brw_tracked_state brw_vs_binding_table = {
@@ -106,8 +113,8 @@ const struct brw_tracked_state brw_vs_binding_table = {
       .mesa = 0,
       .brw = BRW_NEW_BATCH |
              BRW_NEW_VS_CONSTBUF |
+             BRW_NEW_VS_PROG_DATA |
              BRW_NEW_SURFACES,
-      .cache = CACHE_NEW_VS_PROG
    },
    .emit = brw_vs_upload_binding_table,
 };
@@ -117,19 +124,17 @@ const struct brw_tracked_state brw_vs_binding_table = {
 static void
 brw_upload_wm_binding_table(struct brw_context *brw)
 {
-   struct brw_stage_state *stage_state = &brw->wm.base;
-
-   /* BRW_NEW_SURFACES and CACHE_NEW_WM_PROG */
-   brw_upload_binding_table(brw, BRW_NEW_PS_BINDING_TABLE, stage_state,
-                            brw->wm.prog_data->binding_table_size,
-                            SURF_INDEX_WM_SHADER_TIME);
+   brw_upload_binding_table(brw,
+                            _3DSTATE_BINDING_TABLE_POINTERS_PS,
+                            BRW_NEW_PS_BINDING_TABLE, &brw->wm.base);
 }
 
 const struct brw_tracked_state brw_wm_binding_table = {
    .dirty = {
       .mesa = 0,
-      .brw = BRW_NEW_BATCH | BRW_NEW_SURFACES,
-      .cache = CACHE_NEW_WM_PROG
+      .brw = BRW_NEW_BATCH |
+             BRW_NEW_FS_PROG_DATA |
+             BRW_NEW_SURFACES,
    },
    .emit = brw_upload_wm_binding_table,
 };
@@ -138,19 +143,13 @@ const struct brw_tracked_state brw_wm_binding_table = {
 static void
 brw_gs_upload_binding_table(struct brw_context *brw)
 {
-   struct brw_stage_state *stage_state = &brw->gs.base;
-
    /* If there's no GS, skip changing anything. */
-   if (!brw->gs.prog_data)
+   if (brw->geometry_program == NULL)
       return;
 
-   /* CACHE_NEW_GS_PROG */
-   const struct brw_vec4_prog_data *prog_data = &brw->gs.prog_data->base;
-
-   /* BRW_NEW_SURFACES and BRW_NEW_GS_CONSTBUF */
-   brw_upload_binding_table(brw, BRW_NEW_GS_BINDING_TABLE, stage_state,
-                            prog_data->binding_table_size,
-                            SURF_INDEX_VEC4_SHADER_TIME);
+   brw_upload_binding_table(brw,
+                            _3DSTATE_BINDING_TABLE_POINTERS_GS,
+                            BRW_NEW_GS_BINDING_TABLE, &brw->gs.base);
 }
 
 const struct brw_tracked_state brw_gs_binding_table = {
@@ -158,8 +157,8 @@ const struct brw_tracked_state brw_gs_binding_table = {
       .mesa = 0,
       .brw = BRW_NEW_BATCH |
              BRW_NEW_GS_CONSTBUF |
+             BRW_NEW_GS_PROG_DATA |
              BRW_NEW_SURFACES,
-      .cache = CACHE_NEW_GS_PROG
    },
    .emit = brw_gs_upload_binding_table,
 };
@@ -193,12 +192,11 @@ gen4_upload_binding_table_pointers(struct brw_context *brw)
 const struct brw_tracked_state brw_binding_table_pointers = {
    .dirty = {
       .mesa = 0,
-      .brw = (BRW_NEW_BATCH |
-              BRW_NEW_STATE_BASE_ADDRESS |
-              BRW_NEW_VS_BINDING_TABLE |
-              BRW_NEW_GS_BINDING_TABLE |
-              BRW_NEW_PS_BINDING_TABLE),
-      .cache = 0,
+      .brw = BRW_NEW_BATCH |
+             BRW_NEW_GS_BINDING_TABLE |
+             BRW_NEW_PS_BINDING_TABLE |
+             BRW_NEW_STATE_BASE_ADDRESS |
+             BRW_NEW_VS_BINDING_TABLE,
    },
    .emit = gen4_upload_binding_table_pointers,
 };
@@ -219,7 +217,10 @@ gen6_upload_binding_table_pointers(struct brw_context *brw)
              GEN6_BINDING_TABLE_MODIFY_PS |
              (4 - 2));
    OUT_BATCH(brw->vs.base.bind_bo_offset); /* vs */
-   OUT_BATCH(brw->ff_gs.bind_bo_offset); /* gs */
+   if (brw->ff_gs.prog_active)
+      OUT_BATCH(brw->ff_gs.bind_bo_offset); /* gs */
+   else
+      OUT_BATCH(brw->gs.base.bind_bo_offset); /* gs */
    OUT_BATCH(brw->wm.base.bind_bo_offset); /* wm/ps */
    ADVANCE_BATCH();
 }
@@ -227,16 +228,13 @@ gen6_upload_binding_table_pointers(struct brw_context *brw)
 const struct brw_tracked_state gen6_binding_table_pointers = {
    .dirty = {
       .mesa = 0,
-      .brw = (BRW_NEW_BATCH |
-              BRW_NEW_STATE_BASE_ADDRESS |
-              BRW_NEW_VS_BINDING_TABLE |
-              BRW_NEW_GS_BINDING_TABLE |
-              BRW_NEW_PS_BINDING_TABLE),
-      .cache = 0,
+      .brw = BRW_NEW_BATCH |
+             BRW_NEW_GS_BINDING_TABLE |
+             BRW_NEW_PS_BINDING_TABLE |
+             BRW_NEW_STATE_BASE_ADDRESS |
+             BRW_NEW_VS_BINDING_TABLE,
    },
    .emit = gen6_upload_binding_table_pointers,
 };
 
-/* Gen7+ code lives in gen7_{vs,gs,wm}_state.c. */
-
 /** @} */