}
brw_blorp_surface_info::brw_blorp_surface_info()
- : map_stencil_as_y_tiled(false)
+ : map_stencil_as_y_tiled(false),
+ num_samples(0)
{
}
if (mt->format == MESA_FORMAT_S8) {
/* The miptree is a W-tiled stencil buffer. Surface states can't be set
* up for W tiling, so we'll need to use Y tiling and have the WM
- * program swizzle the coordinates.
+ * program swizzle the coordinates. Furthermore, we need to set up the
+ * surface state as single-sampled, because the memory layout of related
+ * samples doesn't match between W and Y tiling.
*/
this->map_stencil_as_y_tiled = true;
+ this->num_samples = 0;
} else {
this->map_stencil_as_y_tiled = false;
+ this->num_samples = mt->num_samples;
}
}
y1(0),
depth_format(0),
hiz_op(GEN6_HIZ_OP_NONE),
+ num_samples(0),
use_wm_prog(false)
{
}
+extern "C" {
void
-brw_blorp_params::exec(struct intel_context *intel) const
+intel_hiz_exec(struct intel_context *intel, struct intel_mipmap_tree *mt,
+ unsigned int level, unsigned int layer, gen6_hiz_op op)
+{
+ brw_hiz_op_params params(mt, level, layer, op);
+ brw_blorp_exec(intel, ¶ms);
+}
+
+} /* extern "C" */
+
+void
+brw_blorp_exec(struct intel_context *intel, const brw_blorp_params *params)
{
switch (intel->gen) {
case 6:
- gen6_blorp_exec(intel, this);
+ gen6_blorp_exec(intel, params);
break;
case 7:
- gen7_blorp_exec(intel, this);
+ gen7_blorp_exec(intel, params);
break;
default:
/* BLORP is not supported before Gen6. */