i965/miptree: Add real support for HiZ

[mesa.git] / src / mesa / drivers / dri / i965 / brw_blorp.h

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
index 7c38d104e991b7c7b0d43a44afaa24544502e47d..076d26dba1a003061683c915ab89b2bb3568b1e5 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -76,76 +76,13 @@ struct brw_blorp_surface_info
    struct isl_surf aux_surf;
    enum isl_aux_usage aux_usage;
 
-   /**
-    * The miplevel to use.
-    */
-   uint32_t level;
-
-   /**
-    * The 2D layer within the miplevel. Combined, level and layer define the
-    * 2D miptree slice to use.
-    *
-    * Note: if mt is a 2D multisample array texture on Gen7+ using
-    * INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, layer is the physical
-    * layer holding sample 0.  So, for example, if mt->num_samples == 4, then
-    * logical layer n corresponds to layer == 4*n.
-    */
-   uint32_t layer;
-
-   /**
-    * Width of the miplevel to be used.  For surfaces using
-    * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
-    */
-   uint32_t width;
-
-   /**
-    * Height of the miplevel to be used.  For surfaces using
-    * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
-    */
-   uint32_t height;
-
-   /**
-    * X offset within the surface to texture from (or render to).  For
-    * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
-    * pixels.
-    */
-   uint32_t x_offset;
-
-   /**
-    * Y offset within the surface to texture from (or render to).  For
-    * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
-    * pixels.
-    */
-   uint32_t y_offset;
-
-   /**
-    * Indicates if we use the standard miptree layout (ALL_LOD_IN_EACH_SLICE),
-    * or if we tightly pack array slices at each LOD (ALL_SLICES_AT_EACH_LOD).
-    *
-    * If ALL_SLICES_AT_EACH_LOD is set, then ARYSPC_LOD0 can be used. Ignored
-    * prior to Gen7.
-    */
-   enum miptree_array_layout array_layout;
-
-   /**
-    * Format that should be used when setting up the surface state for this
-    * surface.  Should correspond to one of the BRW_SURFACEFORMAT_* enums.
-    */
-   uint32_t brw_surfaceformat;
+   struct isl_view view;
 
-   /**
-    * For MSAA surfaces, MSAA layout that should be used when setting up the
-    * surface state for this surface.
-    */
-   enum intel_msaa_layout msaa_layout;
+   /* Z offset into a 3-D texture or slice of a 2-D array texture. */
+   uint32_t z_offset;
 
-   /**
-    * In order to support cases where RGBA format is backing client requested
-    * RGB, one needs to have means to force alpha channel to one when user
-    * requested RGB surface is used as blit source. This is possible by
-    * setting source swizzle for the texture surface.
-    */
-   int swizzle;
+   uint32_t bo_offset;
+   uint32_t tile_x_sa, tile_y_sa;
 };
 
 void
@@ -298,13 +235,15 @@ struct brw_blorp_blit_prog_key
    /* MSAA layout that has been configured in the surface state for texturing
     * from.
     */
-   enum intel_msaa_layout tex_layout;
+   enum isl_msaa_layout tex_layout;
+
+   enum isl_aux_usage tex_aux_usage;
 
    /* Actual number of samples per pixel in the source image. */
    unsigned src_samples;
 
    /* Actual MSAA layout used by the source image. */
-   enum intel_msaa_layout src_layout;
+   enum isl_msaa_layout src_layout;
 
    /* Number of samples per pixel that have been configured in the render
     * target.
@@ -312,13 +251,13 @@ struct brw_blorp_blit_prog_key
    unsigned rt_samples;
 
    /* MSAA layout that has been configured in the render target. */
-   enum intel_msaa_layout rt_layout;
+   enum isl_msaa_layout rt_layout;
 
    /* Actual number of samples per pixel in the destination image. */
    unsigned dst_samples;
 
    /* Actual MSAA layout used by the destination image. */
-   enum intel_msaa_layout dst_layout;
+   enum isl_msaa_layout dst_layout;
 
    /* Type of the data to be read from the texture (one of
     * BRW_REGISTER_TYPE_{UD,D,F}).
@@ -383,6 +322,12 @@ brw_blorp_compile_nir_shader(struct brw_context *brw, struct nir_shader *nir,
                              struct brw_blorp_prog_data *prog_data,
                              unsigned *program_size);
 
+void
+blorp_get_image_offset_sa(struct isl_device *dev, const struct isl_surf *surf,
+                          uint32_t level, uint32_t layer,
+                          uint32_t *x_offset_sa,
+                          uint32_t *y_offset_sa);
+
 uint32_t
 brw_blorp_emit_surface_state(struct brw_context *brw,
                              const struct brw_blorp_surface_info *surface,