#include "intel_mipmap_tree.h"
struct brw_context;
+struct brw_wm_prog_key;
#ifdef __cplusplus
extern "C" {
brw_blorp_blit_miptrees(struct brw_context *brw,
struct intel_mipmap_tree *src_mt,
unsigned src_level, unsigned src_layer,
- mesa_format src_format,
+ mesa_format src_format, int src_swizzle,
struct intel_mipmap_tree *dst_mt,
unsigned dst_level, unsigned dst_layer,
mesa_format dst_format,
GLenum filter, bool mirror_x, bool mirror_y,
bool decode_srgb, bool encode_srgb);
-#ifdef __cplusplus
-} /* end extern "C" */
+bool
+brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb,
+ GLbitfield mask, bool partial_clear, bool encode_srgb);
+
+void
+brw_blorp_resolve_color(struct brw_context *brw,
+ struct intel_mipmap_tree *mt);
/**
* Binding table indices used by BLORP.
*/
enum {
- BRW_BLORP_TEXTURE_BINDING_TABLE_INDEX,
BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX,
+ BRW_BLORP_TEXTURE_BINDING_TABLE_INDEX,
BRW_BLORP_NUM_BINDING_TABLE_ENTRIES
};
-
-class brw_blorp_mip_info
+struct brw_blorp_surface_info
{
-public:
- brw_blorp_mip_info();
-
- void set(struct intel_mipmap_tree *mt,
- unsigned int level, unsigned int layer);
-
struct intel_mipmap_tree *mt;
- /**
- * The miplevel to use.
- */
- uint32_t level;
-
- /**
- * The 2D layer within the miplevel. Combined, level and layer define the
- * 2D miptree slice to use.
- *
- * Note: if mt is a 2D multisample array texture on Gen7+ using
- * INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, layer is the physical
- * layer holding sample 0. So, for example, if mt->num_samples == 4, then
- * logical layer n corresponds to layer == 4*n.
- */
- uint32_t layer;
+ struct isl_surf surf;
- /**
- * Width of the miplevel to be used. For surfaces using
- * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
- */
- uint32_t width;
+ struct isl_surf aux_surf;
+ enum isl_aux_usage aux_usage;
- /**
- * Height of the miplevel to be used. For surfaces using
- * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
- */
- uint32_t height;
+ struct isl_view view;
- /**
- * X offset within the surface to texture from (or render to). For
- * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
- * pixels.
- */
- uint32_t x_offset;
+ /* Z offset into a 3-D texture or slice of a 2-D array texture. */
+ uint32_t z_offset;
- /**
- * Y offset within the surface to texture from (or render to). For
- * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
- * pixels.
- */
- uint32_t y_offset;
+ uint32_t bo_offset;
+ uint32_t tile_x_sa, tile_y_sa;
};
-class brw_blorp_surface_info : public brw_blorp_mip_info
-{
-public:
- brw_blorp_surface_info();
-
- void set(struct brw_context *brw,
- struct intel_mipmap_tree *mt,
- unsigned int level, unsigned int layer,
- mesa_format format, bool is_render_target);
-
- uint32_t compute_tile_offsets(uint32_t *tile_x, uint32_t *tile_y) const;
-
- /* Setting this flag indicates that the buffer's contents are W-tiled
- * stencil data, but the surface state should be set up for Y tiled
- * MESA_FORMAT_R_UNORM8 data (this is necessary because surface states don't
- * support W tiling).
- *
- * Since W tiles are 64 pixels wide by 64 pixels high, whereas Y tiles of
- * MESA_FORMAT_R_UNORM8 data are 128 pixels wide by 32 pixels high, the width and
- * pitch stored in the surface state will be multiplied by 2, and the
- * height will be halved. Also, since W and Y tiles store their data in a
- * different order, the width and height will be rounded up to a multiple
- * of the tile size, to ensure that the WM program can access the full
- * width and height of the buffer.
- */
- bool map_stencil_as_y_tiled;
-
- unsigned num_samples;
-
- /**
- * Indicates if we use the standard miptree layout (ALL_LOD_IN_EACH_SLICE),
- * or if we tightly pack array slices at each LOD (ALL_SLICES_AT_EACH_LOD).
- *
- * If ALL_SLICES_AT_EACH_LOD is set, then ARYSPC_LOD0 can be used. Ignored
- * prior to Gen7.
- */
- enum miptree_array_layout array_layout;
-
- /**
- * Format that should be used when setting up the surface state for this
- * surface. Should correspond to one of the BRW_SURFACEFORMAT_* enums.
- */
- uint32_t brw_surfaceformat;
-
- /**
- * For MSAA surfaces, MSAA layout that should be used when setting up the
- * surface state for this surface.
- */
- intel_msaa_layout msaa_layout;
-};
+void
+brw_blorp_surface_info_init(struct brw_context *brw,
+ struct brw_blorp_surface_info *info,
+ struct intel_mipmap_tree *mt,
+ unsigned int level, unsigned int layer,
+ mesa_format format, bool is_render_target);
-struct brw_blorp_coord_transform_params
+struct brw_blorp_coord_transform
{
- void setup(GLfloat src0, GLfloat src1, GLfloat dst0, GLfloat dst1,
- bool mirror);
-
float multiplier;
float offset;
};
+/**
+ * Bounding rectangle telling pixel discard which pixels are not to be
+ * touched. This is needed in when surfaces are configured as something else
+ * what they really are:
+ *
+ * - writing W-tiled stencil as Y-tiled
+ * - writing interleaved multisampled as single sampled.
+ *
+ * See blorp_nir_discard_if_outside_rect().
+ */
+struct brw_blorp_discard_rect
+{
+ uint32_t x0;
+ uint32_t x1;
+ uint32_t y0;
+ uint32_t y1;
+};
-struct brw_blorp_wm_push_constants
+/**
+ * Grid needed for blended and scaled blits of integer formats, see
+ * blorp_nir_manual_blend_bilinear().
+ */
+struct brw_blorp_rect_grid
{
- uint32_t dst_x0;
- uint32_t dst_x1;
- uint32_t dst_y0;
- uint32_t dst_y1;
- /* Top right coordinates of the rectangular grid used for scaled blitting */
- float rect_grid_x1;
- float rect_grid_y1;
- brw_blorp_coord_transform_params x_transform;
- brw_blorp_coord_transform_params y_transform;
- /* Pad out to an integral number of registers */
- uint32_t pad[6];
+ float x1;
+ float y1;
+ float pad[2];
};
-/* Every 32 bytes of push constant data constitutes one GEN register. */
-const unsigned int BRW_BLORP_NUM_PUSH_CONST_REGS =
- sizeof(brw_blorp_wm_push_constants) / 32;
+struct brw_blorp_wm_inputs
+{
+ struct brw_blorp_discard_rect discard_rect;
+ struct brw_blorp_rect_grid rect_grid;
+ struct brw_blorp_coord_transform coord_transform[2];
+
+ /* Minimum layer setting works for all the textures types but texture_3d
+ * for which the setting has no effect. Use the z-coordinate instead.
+ */
+ uint32_t src_z;
+
+ /* Pad out to an integral number of registers */
+ uint32_t pad[3];
+};
struct brw_blorp_prog_data
{
- unsigned int first_curbe_grf;
+ bool dispatch_8;
+ bool dispatch_16;
+
+ uint8_t first_curbe_grf_0;
+ uint8_t first_curbe_grf_2;
+
+ uint32_t ksp_offset_2;
/**
* True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
* than one sample per pixel.
*/
bool persample_msaa_dispatch;
-};
+ /**
+ * Mask of which FS inputs are marked flat by the shader source. This is
+ * needed for setting up 3DSTATE_SF/SBE.
+ */
+ uint32_t flat_inputs;
+ unsigned num_varying_inputs;
+ GLbitfield64 inputs_read;
+};
-class brw_blorp_params
+static inline unsigned
+brw_blorp_get_urb_length(const struct brw_blorp_prog_data *prog_data)
{
-public:
- brw_blorp_params(unsigned num_varyings = 0,
- unsigned num_draw_buffers = 1,
- unsigned num_layers = 1);
+ if (prog_data == NULL)
+ return 1;
- virtual uint32_t get_wm_prog(struct brw_context *brw,
- brw_blorp_prog_data **prog_data) const = 0;
+ /* From the BSpec: 3D Pipeline - Strips and Fans - 3DSTATE_SBE
+ *
+ * read_length = ceiling((max_source_attr+1)/2)
+ */
+ return MAX2((prog_data->num_varying_inputs + 1) / 2, 1);
+}
+struct brw_blorp_params
+{
uint32_t x0;
uint32_t y0;
uint32_t x1;
uint32_t y1;
- brw_blorp_mip_info depth;
+ struct brw_blorp_surface_info depth;
uint32_t depth_format;
- brw_blorp_surface_info src;
- brw_blorp_surface_info dst;
+ struct brw_blorp_surface_info src;
+ struct brw_blorp_surface_info dst;
enum gen6_hiz_op hiz_op;
- bool use_wm_prog;
- brw_blorp_wm_push_constants wm_push_consts;
- const unsigned num_varyings;
- const unsigned num_draw_buffers;
- const unsigned num_layers;
+ union {
+ unsigned fast_clear_op;
+ unsigned resolve_type;
+ };
+ bool color_write_disable[4];
+ struct brw_blorp_wm_inputs wm_inputs;
+ unsigned num_draw_buffers;
+ unsigned num_layers;
+ uint32_t wm_prog_kernel;
+ struct brw_blorp_prog_data *wm_prog_data;
};
+void
+brw_blorp_params_init(struct brw_blorp_params *params);
+
+void
+brw_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params);
void
-brw_blorp_exec(struct brw_context *brw, const brw_blorp_params *params);
+gen6_blorp_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
+ unsigned level, unsigned layer, enum gen6_hiz_op op);
void
gen6_blorp_exec(struct brw_context *brw,
- const brw_blorp_params *params);
+ const struct brw_blorp_params *params);
void
gen7_blorp_exec(struct brw_context *brw,
- const brw_blorp_params *params);
+ const struct brw_blorp_params *params);
void
-gen8_blorp_exec(struct brw_context *brw, const brw_blorp_params *params);
-
-/**
- * Parameters for a HiZ or depth resolve operation.
- *
- * For an overview of HiZ ops, see the following sections of the Sandy Bridge
- * PRM, Volume 1, Part 2:
- * - 7.5.3.1 Depth Buffer Clear
- * - 7.5.3.2 Depth Buffer Resolve
- * - 7.5.3.3 Hierarchical Depth Buffer Resolve
- */
-class brw_hiz_op_params : public brw_blorp_params
-{
-public:
- brw_hiz_op_params(struct intel_mipmap_tree *mt,
- unsigned int level, unsigned int layer,
- gen6_hiz_op op);
-
- virtual uint32_t get_wm_prog(struct brw_context *brw,
- brw_blorp_prog_data **prog_data) const;
-};
+gen8_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params);
struct brw_blorp_blit_prog_key
{
/* MSAA layout that has been configured in the surface state for texturing
* from.
*/
- intel_msaa_layout tex_layout;
+ enum isl_msaa_layout tex_layout;
+
+ enum isl_aux_usage tex_aux_usage;
/* Actual number of samples per pixel in the source image. */
unsigned src_samples;
/* Actual MSAA layout used by the source image. */
- intel_msaa_layout src_layout;
+ enum isl_msaa_layout src_layout;
/* Number of samples per pixel that have been configured in the render
* target.
unsigned rt_samples;
/* MSAA layout that has been configured in the render target. */
- intel_msaa_layout rt_layout;
+ enum isl_msaa_layout rt_layout;
/* Actual number of samples per pixel in the destination image. */
unsigned dst_samples;
/* Actual MSAA layout used by the destination image. */
- intel_msaa_layout dst_layout;
+ enum isl_msaa_layout dst_layout;
/* Type of the data to be read from the texture (one of
* BRW_REGISTER_TYPE_{UD,D,F}).
bool bilinear_filter;
};
-class brw_blorp_blit_params : public brw_blorp_params
-{
-public:
- brw_blorp_blit_params(struct brw_context *brw,
- struct intel_mipmap_tree *src_mt,
- unsigned src_level, unsigned src_layer,
- mesa_format src_format,
- struct intel_mipmap_tree *dst_mt,
- unsigned dst_level, unsigned dst_layer,
- mesa_format dst_format,
- GLfloat src_x0, GLfloat src_y0,
- GLfloat src_x1, GLfloat src_y1,
- GLfloat dst_x0, GLfloat dst_y0,
- GLfloat dst_x1, GLfloat dst_y1,
- GLenum filter, bool mirror_x, bool mirror_y);
-
- virtual uint32_t get_wm_prog(struct brw_context *brw,
- brw_blorp_prog_data **prog_data) const;
-
-private:
- brw_blorp_blit_prog_key wm_prog_key;
-};
-
/**
* \name BLORP internals
* \{
* Used internally by gen6_blorp_exec() and gen7_blorp_exec().
*/
+void brw_blorp_init_wm_prog_key(struct brw_wm_prog_key *wm_key);
+
+const unsigned *
+brw_blorp_compile_nir_shader(struct brw_context *brw, struct nir_shader *nir,
+ const struct brw_wm_prog_key *wm_key,
+ bool use_repclear,
+ struct brw_blorp_prog_data *prog_data,
+ unsigned *program_size);
+
void
-gen6_blorp_init(struct brw_context *brw);
+blorp_get_image_offset_sa(struct isl_device *dev, const struct isl_surf *surf,
+ uint32_t level, uint32_t layer,
+ uint32_t *x_offset_sa,
+ uint32_t *y_offset_sa);
+
+uint32_t
+brw_blorp_emit_surface_state(struct brw_context *brw,
+ const struct brw_blorp_surface_info *surface,
+ uint32_t read_domains, uint32_t write_domain,
+ bool is_render_target);
void
-gen6_blorp_emit_state_base_address(struct brw_context *brw,
- const brw_blorp_params *params);
+gen6_blorp_init(struct brw_context *brw);
void
gen6_blorp_emit_vertices(struct brw_context *brw,
- const brw_blorp_params *params);
+ const struct brw_blorp_params *params);
uint32_t
gen6_blorp_emit_blend_state(struct brw_context *brw,
- const brw_blorp_params *params);
+ const struct brw_blorp_params *params);
uint32_t
gen6_blorp_emit_cc_state(struct brw_context *brw);
uint32_t
gen6_blorp_emit_wm_constants(struct brw_context *brw,
- const brw_blorp_params *params);
+ const struct brw_blorp_params *params);
void
gen6_blorp_emit_vs_disable(struct brw_context *brw,
- const brw_blorp_params *params);
+ const struct brw_blorp_params *params);
uint32_t
gen6_blorp_emit_binding_table(struct brw_context *brw,
uint32_t
gen6_blorp_emit_depth_stencil_state(struct brw_context *brw,
- const brw_blorp_params *params);
+ const struct brw_blorp_params *params);
void
gen6_blorp_emit_gs_disable(struct brw_context *brw,
- const brw_blorp_params *params);
+ const struct brw_blorp_params *params);
void
gen6_blorp_emit_clip_disable(struct brw_context *brw);
void
gen6_blorp_emit_drawing_rectangle(struct brw_context *brw,
- const brw_blorp_params *params);
+ const struct brw_blorp_params *params);
uint32_t
gen6_blorp_emit_sampler_state(struct brw_context *brw,
unsigned tex_filter, unsigned max_lod,
bool non_normalized_coords);
void
-gen7_blorp_emit_urb_config(struct brw_context *brw);
+gen7_blorp_emit_urb_config(struct brw_context *brw,
+ const struct brw_blorp_params *params);
void
gen7_blorp_emit_blend_state_pointer(struct brw_context *brw,
void
gen7_blorp_emit_clear_params(struct brw_context *brw,
- const brw_blorp_params *params);
+ const struct brw_blorp_params *params);
void
gen7_blorp_emit_constant_ps(struct brw_context *brw,
void
gen7_blorp_emit_primitive(struct brw_context *brw,
- const brw_blorp_params *params);
+ const struct brw_blorp_params *params);
/** \} */
+#ifdef __cplusplus
+} /* end extern "C" */
#endif /* __cplusplus */
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