i965/fs: Lower 32x32 bit multiplication on BXT.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_blorp_blit_eu.cpp

diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp
index 4910b6c4e5959a34f44684100f4d0d6b18382b26..d458ad846bf43d4cbd7d3a78decae74fd9e028e0 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp
@@ -21,18 +21,21 @@
  * IN THE SOFTWARE.
  */
 
-#include "glsl/ralloc.h"
+#include "util/ralloc.h"
 #include "brw_blorp_blit_eu.h"
 #include "brw_blorp.h"
+#include "brw_cfg.h"
 
 brw_blorp_eu_emitter::brw_blorp_eu_emitter(struct brw_context *brw,
                                            bool debug_flag)
    : mem_ctx(ralloc_context(NULL)),
-     generator(brw, mem_ctx,
-               rzalloc(mem_ctx, struct brw_wm_prog_key),
-               rzalloc(mem_ctx, struct brw_wm_prog_data),
-               NULL, NULL, false, debug_flag)
+     generator(brw->intelScreen->compiler, brw,
+               mem_ctx, (void *) rzalloc(mem_ctx, struct brw_wm_prog_key),
+               (struct brw_stage_prog_data *) rzalloc(mem_ctx, struct brw_wm_prog_data),
+               NULL, 0, false, "BLORP")
 {
+   if (debug_flag)
+      generator.enable_debug("blorp");
 }
 
 brw_blorp_eu_emitter::~brw_blorp_eu_emitter()
@@ -41,9 +44,12 @@ brw_blorp_eu_emitter::~brw_blorp_eu_emitter()
 }
 
 const unsigned *
-brw_blorp_eu_emitter::get_program(unsigned *program_size, FILE *dump_file)
+brw_blorp_eu_emitter::get_program(unsigned *program_size)
 {
-   return generator.generate_assembly(NULL, &insts, program_size, dump_file);
+   cfg_t cfg(&insts);
+   generator.generate_code(&cfg, 16);
+
+   return generator.get_assembly(program_size);
 }
 
 /**
@@ -67,7 +73,7 @@ brw_blorp_eu_emitter::emit_kill_if_outside_rect(const struct brw_reg &x,
    emit_cmp(BRW_CONDITIONAL_L, x, dst_x1)->predicate = BRW_PREDICATE_NORMAL;
    emit_cmp(BRW_CONDITIONAL_L, y, dst_y1)->predicate = BRW_PREDICATE_NORMAL;
 
-   fs_inst *inst = new (mem_ctx) fs_inst(BRW_OPCODE_AND, g1, f0, g1);
+   fs_inst *inst = new (mem_ctx) fs_inst(BRW_OPCODE_AND, 16, g1, f0, g1);
    inst->force_writemask_all = true;
    insts.push_tail(inst);
 }
@@ -78,12 +84,12 @@ brw_blorp_eu_emitter::emit_texture_lookup(const struct brw_reg &dst,
                                           unsigned base_mrf,
                                           unsigned msg_length)
 {
-   fs_inst *inst = new (mem_ctx) fs_inst(op, dst, brw_message_reg(base_mrf));
+   fs_inst *inst = new (mem_ctx) fs_inst(op, 16, dst, brw_message_reg(base_mrf),
+                                         fs_reg(0u));
 
    inst->base_mrf = base_mrf;
    inst->mlen = msg_length;
-   inst->sampler = 0;
-   inst->header_present = false;
+   inst->header_size = 0;
 
    insts.push_tail(inst);
 }
@@ -94,12 +100,12 @@ brw_blorp_eu_emitter::emit_render_target_write(const struct brw_reg &src0,
                                                unsigned msg_length,
                                                bool use_header)
 {
-   fs_inst *inst = new (mem_ctx) fs_inst(FS_OPCODE_BLORP_FB_WRITE);
+   fs_inst *inst = new (mem_ctx) fs_inst(FS_OPCODE_BLORP_FB_WRITE, 16);
 
    inst->src[0] = src0;
    inst->base_mrf = msg_reg_nr;
    inst->mlen = msg_length;
-   inst->header_present = use_header;
+   inst->header_size = use_header ? 2 : 0;
    inst->target = BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX;
 
    insts.push_tail(inst);
@@ -113,15 +119,16 @@ brw_blorp_eu_emitter::emit_combine(enum opcode combine_opcode,
 {
    assert(combine_opcode == BRW_OPCODE_ADD || combine_opcode == BRW_OPCODE_AVG);
 
-   insts.push_tail(new (mem_ctx) fs_inst(combine_opcode, dst, src_1, src_2));
+   insts.push_tail(new (mem_ctx) fs_inst(combine_opcode, 16, dst,
+                                         src_1, src_2));
 }
 
 fs_inst *
-brw_blorp_eu_emitter::emit_cmp(int op,
+brw_blorp_eu_emitter::emit_cmp(enum brw_conditional_mod op,
                                const struct brw_reg &x,
                                const struct brw_reg &y)
 {
-   fs_inst *cmp = new (mem_ctx) fs_inst(BRW_OPCODE_CMP,
+   fs_inst *cmp = new (mem_ctx) fs_inst(BRW_OPCODE_CMP, 16,
                                         vec16(brw_null_reg()), x, y);
    cmp->conditional_mod = op;
    insts.push_tail(cmp);