i965: Rewrite the HiZ op

[mesa.git] / src / mesa / drivers / dri / i965 / brw_clip_state.c

diff --git a/src/mesa/drivers/dri/i965/brw_clip_state.c b/src/mesa/drivers/dri/i965/brw_clip_state.c
index 6015c8cbe9fde8e93830b256d3c1641d745d8bab..c9891a744e26758d88bd57e77075ae1655ff5358 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_clip_state.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_state.c
@@ -34,20 +34,25 @@
 #include "brw_defines.h"
 
 static void
-brw_prepare_clip_unit(struct brw_context *brw)
+brw_upload_clip_unit(struct brw_context *brw)
 {
    struct intel_context *intel = &brw->intel;
    struct gl_context *ctx = &intel->ctx;
    struct brw_clip_unit_state *clip;
 
-   clip = brw_state_batch(brw, sizeof(*clip), 32, &brw->clip.state_offset);
+   clip = brw_state_batch(brw, AUB_TRACE_CLIP_STATE,
+                         sizeof(*clip), 32, &brw->clip.state_offset);
    memset(clip, 0, sizeof(*clip));
 
-   /* CACHE_NEW_CLIP_PROG */
+   /* BRW_NEW_PROGRAM_CACHE | CACHE_NEW_CLIP_PROG */
    clip->thread0.grf_reg_count = (ALIGN(brw->clip.prog_data->total_grf, 16) /
                                 16 - 1);
-   /* reloc */
-   clip->thread0.kernel_start_pointer = brw->clip.prog_bo->offset >> 6;
+   clip->thread0.kernel_start_pointer =
+      brw_program_reloc(brw,
+                       brw->clip.state_offset +
+                       offsetof(struct brw_clip_unit_state, thread0),
+                       brw->clip.prog_offset +
+                       (clip->thread0.grf_reg_count << 1)) >> 6;
 
    clip->thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
    clip->thread1.single_program_flow = 1;
@@ -84,16 +89,13 @@ brw_prepare_clip_unit(struct brw_context *brw)
       clip->thread4.max_threads = 1 - 1;
    }
 
-   if (unlikely(INTEL_DEBUG & DEBUG_SINGLE_THREAD))
-      clip->thread4.max_threads = 0;
-
    if (unlikely(INTEL_DEBUG & DEBUG_STATS))
       clip->thread4.stats_enable = 1;
 
    clip->clip5.userclip_enable_flags = 0x7f;
    clip->clip5.userclip_must_clip = 1;
    clip->clip5.guard_band_enable = 0;
-   /* _NEW_TRANSOFORM */
+   /* _NEW_TRANSFORM */
    if (!ctx->Transform.DepthClamp)
       clip->clip5.viewport_z_clip_enable = 1;
    clip->clip5.viewport_xy_clip_enable = 1;
@@ -110,14 +112,6 @@ brw_prepare_clip_unit(struct brw_context *brw)
    clip->viewport_ymin = -1;
    clip->viewport_ymax = 1;
 
-   /* Emit clip program relocation */
-   assert(brw->clip.prog_bo);
-   drm_intel_bo_emit_reloc(intel->batch.bo,
-                          (brw->clip.state_offset +
-                           offsetof(struct brw_clip_unit_state, thread0)),
-                          brw->clip.prog_bo, clip->thread0.grf_reg_count << 1,
-                          I915_GEM_DOMAIN_INSTRUCTION, 0);
-
    brw->state.dirty.cache |= CACHE_NEW_CLIP_UNIT;
 }
 
@@ -125,9 +119,10 @@ const struct brw_tracked_state brw_clip_unit = {
    .dirty = {
       .mesa  = _NEW_TRANSFORM,
       .brw   = (BRW_NEW_BATCH |
+               BRW_NEW_PROGRAM_CACHE |
                BRW_NEW_CURBE_OFFSETS |
                BRW_NEW_URB_FENCE),
       .cache = CACHE_NEW_CLIP_PROG
    },
-   .prepare = brw_prepare_clip_unit,
+   .emit = brw_upload_clip_unit,
 };