Merge commit 'origin/gallium-0.1' into gallium-0.2

[mesa.git] / src / mesa / drivers / dri / i965 / brw_clip_tri.c

diff --git a/src/mesa/drivers/dri/i965/brw_clip_tri.c b/src/mesa/drivers/dri/i965/brw_clip_tri.c
index f1fc6e1e9da875d47faa377cb70616ff375435ca..1dbba37fe7e3afb7a23eebbe6b1c0ab4bb8d3724 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_clip_tri.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_tri.c
@@ -29,11 +29,11 @@
   *   Keith Whitwell <keith@tungstengraphics.com>
   */
 
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
-
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/enums.h"
 #include "shader/program.h"
+
 #include "intel_batchbuffer.h"
 
 #include "brw_defines.h"
@@ -42,16 +42,6 @@
 #include "brw_util.h"
 #include "brw_clip.h"
 
-static struct brw_reg get_tmp( struct brw_clip_compile *c )
-{
-   struct brw_reg tmp = brw_vec4_grf(c->last_tmp, 0);
-
-   if (++c->last_tmp > c->prog_data.total_grf)
-      c->prog_data.total_grf = c->last_tmp;
-
-   return tmp;
-}
-
 static void release_tmps( struct brw_clip_compile *c )
 {
    c->last_tmp = c->first_tmp;
@@ -536,7 +526,7 @@ void brw_emit_tri_clip( struct brw_clip_compile *c )
 
    /* if -ve rhw workaround bit is set, 
       do cliptest */
-   if (!BRW_IS_IGD(p->brw)) {
+   if (!BRW_IS_G4X(p->brw)) {
       brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
       brw_AND(p, brw_null_reg(), get_element_ud(c->reg.R0, 2), 
               brw_imm_ud(1<<20));