i965/fs: Make emit_spill/unspill static functions taking builder as argument.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_clip_unfilled.c

diff --git a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
index 8fe1c0afa03317256f78fccb70a06d871aa770ee..d333d10d2998ae6234499c7b5b97acc83c1197e6 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
@@ -29,7 +29,6 @@
   *   Keith Whitwell <keithw@vmware.com>
   */
 
-#include "main/glheader.h"
 #include "main/macros.h"
 #include "main/enums.h"
 #include "program/program.h"
@@ -86,8 +85,10 @@ static void compute_tri_direction( struct brw_clip_compile *c )
    /* Take their crossproduct:
     */
    brw_set_default_access_mode(p, BRW_ALIGN_16);
-   brw_MUL(p, vec4(brw_null_reg()), brw_swizzle(e, 1,2,0,3),  brw_swizzle(f,2,0,1,3));
-   brw_MAC(p, vec4(e),  negate(brw_swizzle(e, 2,0,1,3)), brw_swizzle(f,1,2,0,3));
+   brw_MUL(p, vec4(brw_null_reg()), brw_swizzle(e, BRW_SWIZZLE_YZXW),
+           brw_swizzle(f, BRW_SWIZZLE_ZXYW));
+   brw_MAC(p, vec4(e),  negate(brw_swizzle(e, BRW_SWIZZLE_ZXYW)),
+           brw_swizzle(f, BRW_SWIZZLE_YZXW));
    brw_set_default_access_mode(p, BRW_ALIGN_1);
 
    brw_MUL(p, c->reg.dir, c->reg.dir, vec4(e));
@@ -135,9 +136,9 @@ static void copy_bfc( struct brw_clip_compile *c )
          brw_clip_have_varying(c, VARYING_SLOT_BFC1)))
       return;
 
-   /* In some wierd degnerate cases we can end up testing the
+   /* In some weird degenerate cases we can end up testing the
     * direction twice, once for culling and once for bfc copying.  Oh
-    * well, that's what you get for setting wierd GL state.
+    * well, that's what you get for setting weird GL state.
     */
    if (c->key.copy_bfc_ccw)
       conditional = BRW_CONDITIONAL_GE;
@@ -188,6 +189,12 @@ static void copy_bfc( struct brw_clip_compile *c )
   GLfloat bc   = dir.y * iz;
   offset = ctx->Polygon.OffsetUnits * DEPTH_SCALE;
   offset += MAX2( abs(ac), abs(bc) ) * ctx->Polygon.OffsetFactor;
+  if (ctx->Polygon.OffsetClamp && isfinite(ctx->Polygon.OffsetClamp)) {
+    if (ctx->Polygon.OffsetClamp < 0)
+      offset = MAX2( offset, ctx->Polygon.OffsetClamp );
+    else
+      offset = MIN2( offset, ctx->Polygon.OffsetClamp );
+  }
   offset *= MRD;
 */
 static void compute_offset( struct brw_clip_compile *c )
@@ -211,6 +218,14 @@ static void compute_offset( struct brw_clip_compile *c )
 
    brw_MUL(p, vec1(off), vec1(off), brw_imm_f(c->key.offset_factor));
    brw_ADD(p, vec1(off), vec1(off), brw_imm_f(c->key.offset_units));
+   if (c->key.offset_clamp && isfinite(c->key.offset_clamp)) {
+      brw_CMP(p,
+              vec1(brw_null_reg()),
+              c->key.offset_clamp < 0 ? BRW_CONDITIONAL_GE : BRW_CONDITIONAL_L,
+              vec1(off),
+              brw_imm_f(c->key.offset_clamp));
+      brw_SEL(p, vec1(off), vec1(off), brw_imm_f(c->key.offset_clamp));
+   }
 }
 
 
@@ -278,7 +293,7 @@ static void emit_lines(struct brw_clip_compile *c,
    struct brw_indirect v0ptr = brw_indirect(2, 0);
    struct brw_indirect v1ptr = brw_indirect(3, 0);
 
-   /* Need a seperate loop for offset:
+   /* Need a separate loop for offset:
     */
    if (do_offset) {
       brw_MOV(p, c->reg.loopcount, c->reg.nr_verts);
@@ -288,9 +303,9 @@ static void emit_lines(struct brw_clip_compile *c,
       {
         brw_MOV(p, get_addr_reg(v0), deref_1uw(v0ptr, 0));
         brw_ADD(p, get_addr_reg(v0ptr), get_addr_reg(v0ptr), brw_imm_uw(2));
-       
+
         apply_one_offset(c, v0);
-       
+
         brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
          brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_G);
       }
@@ -520,6 +535,3 @@ void brw_emit_unfilled_clip( struct brw_clip_compile *c )
    emit_unfilled_primitives(c);
    brw_clip_kill_thread(c);
 }
-
-
-