i965/blorp: Use blorp_address in brw_blorp_surface instead of bo+offset

[mesa.git] / src / mesa / drivers / dri / i965 / brw_clip_unfilled.c

diff --git a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
index 9a4d2a9d6f950805b0b00762e026ab0a00e95d4b..d333d10d2998ae6234499c7b5b97acc83c1197e6 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
@@ -29,7 +29,6 @@
   *   Keith Whitwell <keithw@vmware.com>
   */
 
-#include "main/glheader.h"
 #include "main/macros.h"
 #include "main/enums.h"
 #include "program/program.h"
@@ -86,8 +85,10 @@ static void compute_tri_direction( struct brw_clip_compile *c )
    /* Take their crossproduct:
     */
    brw_set_default_access_mode(p, BRW_ALIGN_16);
-   brw_MUL(p, vec4(brw_null_reg()), brw_swizzle(e, 1,2,0,3),  brw_swizzle(f,2,0,1,3));
-   brw_MAC(p, vec4(e),  negate(brw_swizzle(e, 2,0,1,3)), brw_swizzle(f,1,2,0,3));
+   brw_MUL(p, vec4(brw_null_reg()), brw_swizzle(e, BRW_SWIZZLE_YZXW),
+           brw_swizzle(f, BRW_SWIZZLE_ZXYW));
+   brw_MAC(p, vec4(e),  negate(brw_swizzle(e, BRW_SWIZZLE_ZXYW)),
+           brw_swizzle(f, BRW_SWIZZLE_YZXW));
    brw_set_default_access_mode(p, BRW_ALIGN_1);
 
    brw_MUL(p, c->reg.dir, c->reg.dir, vec4(e));
@@ -302,9 +303,9 @@ static void emit_lines(struct brw_clip_compile *c,
       {
         brw_MOV(p, get_addr_reg(v0), deref_1uw(v0ptr, 0));
         brw_ADD(p, get_addr_reg(v0ptr), get_addr_reg(v0ptr), brw_imm_uw(2));
-       
+
         apply_one_offset(c, v0);
-       
+
         brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
          brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_G);
       }
@@ -534,6 +535,3 @@ void brw_emit_unfilled_clip( struct brw_clip_compile *c )
    emit_unfilled_primitives(c);
    brw_clip_kill_thread(c);
 }
-
-
-