i965/vec4: Make with_writemask() non-static.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_clip_util.c

diff --git a/src/mesa/drivers/dri/i965/brw_clip_util.c b/src/mesa/drivers/dri/i965/brw_clip_util.c
index b188bf773840581b48ec7debabb4892a258f59ac..24d053eaea6ad727bc9f6c20afdd54901494c3e5 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_clip_util.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_util.c
@@ -256,41 +256,48 @@ void brw_clip_interp_vertex( struct brw_clip_compile *c,
            brw_MOV(p, deref_4f(dest_ptr, delta), brw_imm_f(1));
         else
            brw_MOV(p, deref_4f(dest_ptr, delta), deref_4f(v0_ptr, delta));
-      } else if (varying == VARYING_SLOT_PSIZ ||
-                 varying == VARYING_SLOT_CLIP_DIST0 ||
-                 varying == VARYING_SLOT_CLIP_DIST1) {
-        /* PSIZ doesn't need interpolation because it isn't used by the
-          * fragment shader.  CLIP_DIST0 and CLIP_DIST1 don't need
-          * intepolation because on pre-GEN6, these are just placeholder VUE
-          * slots that don't perform any action.
+      } else if (varying == VARYING_SLOT_PSIZ) {
+         /* PSIZ doesn't need interpolation because it isn't used by the
+          * fragment shader.
           */
       } else if (varying < VARYING_SLOT_MAX) {
         /* This is a true vertex result (and not a special value for the VUE
          * header), so interpolate:
          *
          *        New = attr0 + t*attr1 - t*attr0
+          *
+          * Unless the attribute is flat shaded -- in which case just copy
+          * from one of the sources (doesn't matter which; already copied from pv)
          */
-         struct brw_reg tmp = get_tmp(c);
-         struct brw_reg t =
-            c->key.interpolation_mode.mode[slot] == INTERP_QUALIFIER_NOPERSPECTIVE ?
-            t_nopersp : t0;
-
-        brw_MUL(p, 
-                vec4(brw_null_reg()),
-                deref_4f(v1_ptr, delta),
-                t);
-
-        brw_MAC(p, 
-                tmp,         
-                negate(deref_4f(v0_ptr, delta)),
-                t); 
-             
-        brw_ADD(p,
-                deref_4f(dest_ptr, delta), 
-                deref_4f(v0_ptr, delta),
-                tmp);
-
-         release_tmp(c, tmp);
+         GLuint interp = c->key.interpolation_mode.mode[slot];
+
+         if (interp != INTERP_QUALIFIER_FLAT) {
+            struct brw_reg tmp = get_tmp(c);
+            struct brw_reg t =
+               interp == INTERP_QUALIFIER_NOPERSPECTIVE ? t_nopersp : t0;
+
+            brw_MUL(p,
+                  vec4(brw_null_reg()),
+                  deref_4f(v1_ptr, delta),
+                  t);
+
+            brw_MAC(p,
+                  tmp,
+                  negate(deref_4f(v0_ptr, delta)),
+                  t);
+
+            brw_ADD(p,
+                  deref_4f(dest_ptr, delta),
+                  deref_4f(v0_ptr, delta),
+                  tmp);
+
+            release_tmp(c, tmp);
+         }
+         else {
+            brw_MOV(p,
+                  deref_4f(dest_ptr, delta),
+                  deref_4f(v0_ptr, delta));
+         }
       }
    }
 
@@ -306,15 +313,18 @@ void brw_clip_interp_vertex( struct brw_clip_compile *c,
 
 void brw_clip_emit_vue(struct brw_clip_compile *c, 
                       struct brw_indirect vert,
-                      bool allocate,
-                      bool eot,
+                       enum brw_urb_write_flags flags,
                       GLuint header)
 {
    struct brw_compile *p = &c->func;
+   bool allocate = flags & BRW_URB_WRITE_ALLOCATE;
 
    brw_clip_ff_sync(c);
 
-   assert(!(allocate && eot));
+   /* Any URB entry that is allocated must subsequently be used or discarded,
+    * so it doesn't make sense to mark EOT and ALLOCATE at the same time.
+    */
+   assert(!(allocate && (flags & BRW_URB_WRITE_EOT)));
 
    /* Copy the vertex from vertn into m1..mN+1:
     */
@@ -336,12 +346,9 @@ void brw_clip_emit_vue(struct brw_clip_compile *c,
                 allocate ? c->reg.R0 : retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
                 0,
                 c->reg.R0,
-                allocate,
-                1,             /* used */
+                 flags,
                 c->nr_regs + 1, /* msg length */
                 allocate ? 1 : 0, /* response_length */ 
-                eot,           /* eot */
-                1,             /* writes_complete */
                 0,             /* urb offset */
                 BRW_URB_SWIZZLE_NONE);
 }
@@ -360,12 +367,9 @@ void brw_clip_kill_thread(struct brw_clip_compile *c)
                 retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
                 0,
                 c->reg.R0,
-                0,             /* allocate */
-                0,             /* used */
+                 BRW_URB_WRITE_UNUSED | BRW_URB_WRITE_EOT_COMPLETE,
                 1,             /* msg len */
                 0,             /* response len */
-                1,             /* eot */
-                1,             /* writes complete */
                 0,
                 BRW_URB_SWIZZLE_NONE);
 }
@@ -413,6 +417,7 @@ void brw_clip_init_clipmask( struct brw_clip_compile *c )
 {
    struct brw_compile *p = &c->func;
    struct brw_reg incoming = get_element_ud(c->reg.R0, 2);
+   struct brw_context *brw = p->brw;
    
    /* Shift so that lowest outcode bit is rightmost: 
     */
@@ -424,7 +429,11 @@ void brw_clip_init_clipmask( struct brw_clip_compile *c )
       /* Rearrange userclip outcodes so that they come directly after
        * the fixed plane bits.
        */
-      brw_AND(p, tmp, incoming, brw_imm_ud(0x3f<<14));
+      if (brw->gen == 5 || brw->is_g4x)
+         brw_AND(p, tmp, incoming, brw_imm_ud(0xff<<14));
+      else
+         brw_AND(p, tmp, incoming, brw_imm_ud(0x3f<<14));
+
       brw_SHR(p, tmp, tmp, brw_imm_ud(8));
       brw_OR(p, c->reg.planemask, c->reg.planemask, tmp);