i965/urb: fixes division by zero

[mesa.git] / src / mesa / drivers / dri / i965 / brw_conditional_render.c

diff --git a/src/mesa/drivers/dri/i965/brw_conditional_render.c b/src/mesa/drivers/dri/i965/brw_conditional_render.c
index 6d37c3b69282b9216d38d87f52c465816bd5bac3..122a4ecc0f651c9b90ca3ea7295a9d252589ce06 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_conditional_render.c
+++ b/src/mesa/drivers/dri/i965/brw_conditional_render.c
@@ -56,6 +56,12 @@ set_predicate_for_result(struct brw_context *brw,
 
    assert(query->bo != NULL);
 
+   /* Needed to ensure the memory is coherent for the MI_LOAD_REGISTER_MEM
+    * command when loading the values into the predicate source registers for
+    * conditional rendering.
+    */
+   brw_emit_pipe_control_flush(brw, PIPE_CONTROL_FLUSH_ENABLE);
+
    brw_load_register_mem64(brw,
                            MI_PREDICATE_SRC0,
                            query->bo,