i965/fs: Add support for translating ir_triop_fma into MAD.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_context.c

diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index a201eed6bb0e9646cd85e80b2cc266731c80f434..23210761d4312da960586dd9644fc5d1a1f87eff 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -190,7 +190,7 @@ brw_initialize_context_constants(struct brw_context *brw)
    ctx->Const.MaxPointSizeAA = 255.0;
    ctx->Const.PointSizeGranularity = 1.0;
 
-   if (brw->gen >= 6)
+   if (brw->gen >= 5 || brw->is_g4x)
       ctx->Const.MaxClipPlanes = 8;
 
    ctx->Const.VertexProgram.MaxNativeInstructions = 16 * 1024;
@@ -248,7 +248,7 @@ brw_initialize_context_constants(struct brw_context *brw)
       driQueryOptionb(&brw->optionCache, "disable_glsl_line_continuations");
 
    /* We want the GLSL compiler to emit code that uses condition codes */
-   for (int i = 0; i <= MESA_SHADER_FRAGMENT; i++) {
+   for (int i = 0; i < MESA_SHADER_TYPES; i++) {
       ctx->ShaderCompilerOptions[i].MaxIfDepth = brw->gen < 6 ? 16 : UINT_MAX;
       ctx->ShaderCompilerOptions[i].EmitCondCodes = true;
       ctx->ShaderCompilerOptions[i].EmitNoNoise = true;
@@ -448,6 +448,11 @@ brwCreateContext(int api,
    brw->state.dirty.mesa = ~0;
    brw->state.dirty.brw = ~0;
 
+   /* Make sure that brw->state.dirty.brw has enough bits to hold all possible
+    * dirty flags.
+    */
+   STATIC_ASSERT(BRW_NUM_STATE_BITS <= 8 * sizeof(brw->state.dirty.brw));
+
    brw->emit_state_always = 0;
 
    brw->batch.need_workaround_flush = true;
@@ -471,6 +476,7 @@ brwCreateContext(int api,
    }
 
    brw_fs_alloc_reg_sets(brw);
+   brw_vec4_alloc_reg_set(brw);
 
    if (INTEL_DEBUG & DEBUG_SHADER_TIME)
       brw_init_shader_time(brw);