#include "main/version.h"
#include "main/vtxfmt.h"
#include "main/texobj.h"
+#include "main/framebuffer.h"
#include "vbo/vbo_context.h"
#include "brw_context.h"
#include "brw_defines.h"
+#include "brw_compiler.h"
#include "brw_draw.h"
#include "brw_state.h"
#include "tnl/tnl.h"
#include "tnl/t_pipeline.h"
#include "util/ralloc.h"
-
-#include "glsl/nir/nir.h"
+#include "util/debug.h"
/***************************************
* Mesa's Driver Functions
***************************************/
-static size_t
-brw_query_samples_for_format(struct gl_context *ctx, GLenum target,
- GLenum internalFormat, int samples[16])
-{
- struct brw_context *brw = brw_context(ctx);
-
- (void) target;
-
- switch (brw->gen) {
- case 9:
- case 8:
- samples[0] = 8;
- samples[1] = 4;
- samples[2] = 2;
- return 3;
-
- case 7:
- samples[0] = 8;
- samples[1] = 4;
- return 2;
-
- case 6:
- samples[0] = 4;
- return 1;
+const char *const brw_vendor_string = "Intel Open Source Technology Center";
+static const char *
+get_bsw_model(const struct intel_screen *intelScreen)
+{
+ switch (intelScreen->eu_total) {
+ case 16:
+ return "405";
+ case 12:
+ return "400";
default:
- assert(brw->gen < 6);
- samples[0] = 1;
- return 1;
+ return " ";
}
}
-const char *const brw_vendor_string = "Intel Open Source Technology Center";
-
const char *
-brw_get_renderer_string(unsigned deviceID)
+brw_get_renderer_string(const struct intel_screen *intelScreen)
{
const char *chipset;
static char buffer[128];
+ char *bsw = NULL;
- switch (deviceID) {
+ switch (intelScreen->deviceID) {
#undef CHIPSET
#define CHIPSET(id, symbol, str) case id: chipset = str; break;
#include "pci_ids/i965_pci_ids.h"
break;
}
+ /* Braswell branding is funny, so we have to fix it up here */
+ if (intelScreen->deviceID == 0x22B1) {
+ bsw = strdup(chipset);
+ char *needle = strstr(bsw, "XXX");
+ if (needle) {
+ memcpy(needle, get_bsw_model(intelScreen), 3);
+ chipset = bsw;
+ }
+ }
+
(void) driGetRendererString(buffer, chipset, 0);
+ free(bsw);
return buffer;
}
case GL_RENDERER:
return
- (GLubyte *) brw_get_renderer_string(brw->intelScreen->deviceID);
+ (GLubyte *) brw_get_renderer_string(brw->intelScreen);
default:
return NULL;
__DRIcontext *driContext = brw->driContext;
if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
- dri2InvalidateDrawable(driContext->driDrawablePriv);
- dri2InvalidateDrawable(driContext->driReadablePriv);
+ if (driContext->driDrawablePriv)
+ dri2InvalidateDrawable(driContext->driDrawablePriv);
+ if (driContext->driReadablePriv)
+ dri2InvalidateDrawable(driContext->driReadablePriv);
}
}
+static void
+intel_update_framebuffer(struct gl_context *ctx,
+ struct gl_framebuffer *fb)
+{
+ struct brw_context *brw = brw_context(ctx);
+
+ /* Quantize the derived default number of samples
+ */
+ fb->DefaultGeometry._NumSamples =
+ intel_quantize_num_samples(brw->intelScreen,
+ fb->DefaultGeometry.NumSamples);
+}
+
static void
intel_update_state(struct gl_context * ctx, GLuint new_state)
{
if (!tex_obj || !tex_obj->mt)
continue;
intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt);
- intel_miptree_resolve_color(brw, tex_obj->mt);
+ /* Sampling engine understands lossless compression and resolving
+ * those surfaces should be skipped for performance reasons.
+ */
+ intel_miptree_resolve_color(brw, tex_obj->mt,
+ INTEL_MIPTREE_IGNORE_CCS_E);
brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
}
+ /* Resolve color for each active shader image. */
+ for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
+ const struct gl_shader *shader = ctx->_Shader->CurrentProgram[i] ?
+ ctx->_Shader->CurrentProgram[i]->_LinkedShaders[i] : NULL;
+
+ if (unlikely(shader && shader->NumImages)) {
+ for (unsigned j = 0; j < shader->NumImages; j++) {
+ struct gl_image_unit *u = &ctx->ImageUnits[shader->ImageUnits[j]];
+ tex_obj = intel_texture_object(u->TexObj);
+
+ if (tex_obj && tex_obj->mt) {
+ /* Access to images is implemented using indirect messages
+ * against data port. Normal render target write understands
+ * lossless compression but unfortunately the typed/untyped
+ * read/write interface doesn't. Therefore the compressed
+ * surfaces need to be resolved prior to accessing them.
+ */
+ intel_miptree_resolve_color(brw, tex_obj->mt, 0);
+ brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
+ }
+ }
+ }
+ }
+
+ /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the
+ * single-sampled color renderbuffers because the CCS buffer isn't
+ * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is
+ * enabled because otherwise the surface state will be programmed with the
+ * linear equivalent format anyway.
+ */
+ if (brw->gen >= 9 && ctx->Color.sRGBEnabled) {
+ struct gl_framebuffer *fb = ctx->DrawBuffer;
+ for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
+ struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[i];
+
+ if (rb == NULL)
+ continue;
+
+ struct intel_renderbuffer *irb = intel_renderbuffer(rb);
+ struct intel_mipmap_tree *mt = irb->mt;
+
+ if (mt == NULL ||
+ mt->num_samples > 1 ||
+ _mesa_get_srgb_format_linear(mt->format) == mt->format)
+ continue;
+
+ /* Lossless compression is not supported for SRGB formats, it
+ * should be impossible to get here with such surfaces.
+ */
+ assert(!intel_miptree_is_lossless_compressed(brw, mt));
+ intel_miptree_resolve_color(brw, mt, 0);
+ brw_render_cache_set_check_flush(brw, mt->bo);
+ }
+ }
+
_mesa_lock_context_textures(ctx);
+
+ if (new_state & _NEW_BUFFERS) {
+ intel_update_framebuffer(ctx, ctx->DrawBuffer);
+ if (ctx->DrawBuffer != ctx->ReadBuffer)
+ intel_update_framebuffer(ctx, ctx->ReadBuffer);
+ }
}
#define flushFront(screen) ((screen)->image.loader ? (screen)->image.loader->flushFrontBuffer : (screen)->dri2.loader->flushFrontBuffer)
brwInitFragProgFuncs( functions );
brw_init_common_queryobj_functions(functions);
- if (brw->gen >= 6)
+ if (brw->gen >= 8 || brw->is_haswell)
+ hsw_init_queryobj_functions(functions);
+ else if (brw->gen >= 6)
gen6_init_queryobj_functions(functions);
else
gen4_init_queryobj_functions(functions);
+ brw_init_compute_functions(functions);
+ if (brw->gen >= 7)
+ brw_init_conditional_render_functions(functions);
- functions->QuerySamplesForFormat = brw_query_samples_for_format;
+ functions->QueryInternalFormat = brw_query_internal_format;
functions->NewTransformFeedback = brw_new_transform_feedback;
functions->DeleteTransformFeedback = brw_delete_transform_feedback;
- functions->GetTransformFeedbackVertexCount =
- brw_get_transform_feedback_vertex_count;
- if (brw->gen >= 7) {
+ if (brw->intelScreen->has_mi_math_and_lrr) {
+ functions->BeginTransformFeedback = hsw_begin_transform_feedback;
+ functions->EndTransformFeedback = hsw_end_transform_feedback;
+ functions->PauseTransformFeedback = hsw_pause_transform_feedback;
+ functions->ResumeTransformFeedback = hsw_resume_transform_feedback;
+ } else if (brw->gen >= 7) {
functions->BeginTransformFeedback = gen7_begin_transform_feedback;
functions->EndTransformFeedback = gen7_end_transform_feedback;
functions->PauseTransformFeedback = gen7_pause_transform_feedback;
functions->ResumeTransformFeedback = gen7_resume_transform_feedback;
+ functions->GetTransformFeedbackVertexCount =
+ brw_get_transform_feedback_vertex_count;
} else {
functions->BeginTransformFeedback = brw_begin_transform_feedback;
functions->EndTransformFeedback = brw_end_transform_feedback;
brw_initialize_context_constants(struct brw_context *brw)
{
struct gl_context *ctx = &brw->ctx;
+ const struct brw_compiler *compiler = brw->intelScreen->compiler;
+
+ const bool stage_exists[MESA_SHADER_STAGES] = {
+ [MESA_SHADER_VERTEX] = true,
+ [MESA_SHADER_TESS_CTRL] = brw->gen >= 7,
+ [MESA_SHADER_TESS_EVAL] = brw->gen >= 7,
+ [MESA_SHADER_GEOMETRY] = brw->gen >= 6,
+ [MESA_SHADER_FRAGMENT] = true,
+ [MESA_SHADER_COMPUTE] =
+ (ctx->API == API_OPENGL_CORE &&
+ ctx->Const.MaxComputeWorkGroupSize[0] >= 1024) ||
+ (ctx->API == API_OPENGLES2 &&
+ ctx->Const.MaxComputeWorkGroupSize[0] >= 128) ||
+ _mesa_extension_override_enables.ARB_compute_shader,
+ };
+
+ unsigned num_stages = 0;
+ for (int i = 0; i < MESA_SHADER_STAGES; i++) {
+ if (stage_exists[i])
+ num_stages++;
+ }
unsigned max_samplers =
brw->gen >= 8 || brw->is_haswell ? BRW_MAX_TEX_UNIT : 16;
- ctx->Const.QueryCounterBits.Timestamp = 36;
-
- ctx->Const.StripTextureBorder = true;
-
ctx->Const.MaxDualSourceDrawBuffers = 1;
ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
- ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits = max_samplers;
+ ctx->Const.MaxCombinedShaderOutputResources =
+ MAX_IMAGE_UNITS + BRW_MAX_DRAW_BUFFERS;
+
+ ctx->Const.QueryCounterBits.Timestamp = 36;
+
ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
- ctx->Const.MaxTextureUnits =
- MIN2(ctx->Const.MaxTextureCoordUnits,
- ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits);
- ctx->Const.Program[MESA_SHADER_VERTEX].MaxTextureImageUnits = max_samplers;
- if (brw->gen >= 6)
- ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxTextureImageUnits = max_samplers;
- else
- ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxTextureImageUnits = 0;
- if (_mesa_extension_override_enables.ARB_compute_shader) {
- ctx->Const.Program[MESA_SHADER_COMPUTE].MaxTextureImageUnits = BRW_MAX_TEX_UNIT;
- ctx->Const.MaxUniformBufferBindings += 12;
- } else {
- ctx->Const.Program[MESA_SHADER_COMPUTE].MaxTextureImageUnits = 0;
- }
- ctx->Const.MaxCombinedTextureImageUnits =
- ctx->Const.Program[MESA_SHADER_VERTEX].MaxTextureImageUnits +
- ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits +
- ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxTextureImageUnits +
- ctx->Const.Program[MESA_SHADER_COMPUTE].MaxTextureImageUnits;
-
- ctx->Const.MaxTextureLevels = 14; /* 8192 */
- if (ctx->Const.MaxTextureLevels > MAX_TEXTURE_LEVELS)
- ctx->Const.MaxTextureLevels = MAX_TEXTURE_LEVELS;
+ ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS;
+ ctx->Const.MaxRenderbufferSize = 8192;
+ ctx->Const.MaxTextureLevels = MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS);
ctx->Const.Max3DTextureLevels = 12; /* 2048 */
ctx->Const.MaxCubeTextureLevels = 14; /* 8192 */
+ ctx->Const.MaxArrayTextureLayers = brw->gen >= 7 ? 2048 : 512;
ctx->Const.MaxTextureMbytes = 1536;
-
+ ctx->Const.MaxTextureRectSize = 1 << 12;
+ ctx->Const.MaxTextureMaxAnisotropy = 16.0;
+ ctx->Const.StripTextureBorder = true;
if (brw->gen >= 7)
- ctx->Const.MaxArrayTextureLayers = 2048;
- else
- ctx->Const.MaxArrayTextureLayers = 512;
+ ctx->Const.MaxProgramTextureGatherComponents = 4;
+ else if (brw->gen == 6)
+ ctx->Const.MaxProgramTextureGatherComponents = 1;
- ctx->Const.MaxTextureRectSize = 1 << 12;
+ ctx->Const.MaxUniformBlockSize = 65536;
- ctx->Const.MaxTextureMaxAnisotropy = 16.0;
+ for (int i = 0; i < MESA_SHADER_STAGES; i++) {
+ struct gl_program_constants *prog = &ctx->Const.Program[i];
+
+ if (!stage_exists[i])
+ continue;
+
+ prog->MaxTextureImageUnits = max_samplers;
+
+ prog->MaxUniformBlocks = BRW_MAX_UBO;
+ prog->MaxCombinedUniformComponents =
+ prog->MaxUniformComponents +
+ ctx->Const.MaxUniformBlockSize / 4 * prog->MaxUniformBlocks;
+
+ prog->MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
+ prog->MaxAtomicBuffers = BRW_MAX_ABO;
+ prog->MaxImageUniforms = compiler->scalar_stage[i] ? BRW_MAX_IMAGES : 0;
+ prog->MaxShaderStorageBlocks = BRW_MAX_SSBO;
+ }
+
+ ctx->Const.MaxTextureUnits =
+ MIN2(ctx->Const.MaxTextureCoordUnits,
+ ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits);
+
+ ctx->Const.MaxUniformBufferBindings = num_stages * BRW_MAX_UBO;
+ ctx->Const.MaxCombinedUniformBlocks = num_stages * BRW_MAX_UBO;
+ ctx->Const.MaxCombinedAtomicBuffers = num_stages * BRW_MAX_ABO;
+ ctx->Const.MaxCombinedShaderStorageBlocks = num_stages * BRW_MAX_SSBO;
+ ctx->Const.MaxShaderStorageBufferBindings = num_stages * BRW_MAX_SSBO;
+ ctx->Const.MaxCombinedTextureImageUnits = num_stages * max_samplers;
+ ctx->Const.MaxCombinedImageUniforms = num_stages * BRW_MAX_IMAGES;
- ctx->Const.MaxRenderbufferSize = 8192;
/* Hardware only supports a limited number of transform feedback buffers.
* So we need to override the Mesa default (which is based only on software
ctx->Const.MaxTransformFeedbackSeparateComponents =
BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS;
- ctx->Const.AlwaysUseGetTransformFeedbackVertexCount = true;
+ ctx->Const.AlwaysUseGetTransformFeedbackVertexCount =
+ !brw->intelScreen->has_mi_math_and_lrr;
int max_samples;
const int *msaa_modes = intel_supported_msaa_modes(brw->intelScreen);
ctx->Const.MaxColorTextureSamples = max_samples;
ctx->Const.MaxDepthTextureSamples = max_samples;
ctx->Const.MaxIntegerSamples = max_samples;
+ ctx->Const.MaxImageSamples = 0;
/* gen6_set_sample_maps() sets SampleMap{2,4,8}x variables which are used
* to map indices of rectangular grid to sample numbers within a pixel.
*/
gen6_set_sample_maps(ctx);
- if (brw->gen >= 7)
- ctx->Const.MaxProgramTextureGatherComponents = 4;
- else if (brw->gen == 6)
- ctx->Const.MaxProgramTextureGatherComponents = 1;
-
ctx->Const.MinLineWidth = 1.0;
ctx->Const.MinLineWidthAA = 1.0;
- if (brw->gen >= 9 || brw->is_cherryview) {
- ctx->Const.MaxLineWidth = 40.0;
- ctx->Const.MaxLineWidthAA = 40.0;
- ctx->Const.LineWidthGranularity = 0.125;
- } else if (brw->gen >= 6) {
+ if (brw->gen >= 6) {
ctx->Const.MaxLineWidth = 7.375;
ctx->Const.MaxLineWidthAA = 7.375;
ctx->Const.LineWidthGranularity = 0.125;
ctx->Const.LineWidthGranularity = 0.5;
}
+ /* For non-antialiased lines, we have to round the line width to the
+ * nearest whole number. Make sure that we don't advertise a line
+ * width that, when rounded, will be beyond the actual hardware
+ * maximum.
+ */
+ assert(roundf(ctx->Const.MaxLineWidth) <= ctx->Const.MaxLineWidth);
+
ctx->Const.MinPointSize = 1.0;
ctx->Const.MinPointSizeAA = 1.0;
ctx->Const.MaxPointSize = 255.0;
if (brw->gen >= 5 || brw->is_g4x)
ctx->Const.MaxClipPlanes = 8;
+ ctx->Const.LowerTessLevel = true;
+ ctx->Const.PrimitiveRestartForPatches = true;
+
ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeInstructions = 16 * 1024;
ctx->Const.Program[MESA_SHADER_VERTEX].MaxAluInstructions = 0;
ctx->Const.Program[MESA_SHADER_VERTEX].MaxTexInstructions = 0;
ctx->Const.Program[MESA_SHADER_VERTEX].HighInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
ctx->Const.Program[MESA_SHADER_VERTEX].MediumInt = ctx->Const.Program[MESA_SHADER_VERTEX].LowInt;
- if (brw->gen >= 7) {
- ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
- ctx->Const.Program[MESA_SHADER_VERTEX].MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
- ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
- ctx->Const.Program[MESA_SHADER_COMPUTE].MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
- ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxAtomicBuffers = BRW_MAX_ABO;
- ctx->Const.Program[MESA_SHADER_VERTEX].MaxAtomicBuffers = BRW_MAX_ABO;
- ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxAtomicBuffers = BRW_MAX_ABO;
- ctx->Const.Program[MESA_SHADER_COMPUTE].MaxAtomicBuffers = BRW_MAX_ABO;
- ctx->Const.MaxCombinedAtomicBuffers = 3 * BRW_MAX_ABO;
- }
-
/* Gen6 converts quads to polygon in beginning of 3D pipeline,
* but we're not sure how it's actually done for vertex order,
* that affect provoking vertex decision. Always use last vertex
* However, unaligned accesses are slower, so enforce buffer alignment.
*/
ctx->Const.UniformBufferOffsetAlignment = 16;
+
+ /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
+ * that we can safely have the CPU and GPU writing the same SSBO on
+ * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
+ * writes, so there's no problem. For an SSBO, the GPU and the CPU can
+ * be updating disjoint regions of the buffer simultaneously and that will
+ * break if the regions overlap the same cacheline.
+ */
+ ctx->Const.ShaderStorageBufferOffsetAlignment = 64;
ctx->Const.TextureBufferOffsetAlignment = 16;
+ ctx->Const.MaxTextureBufferSize = 128 * 1024 * 1024;
if (brw->gen >= 6) {
ctx->Const.MaxVarying = 32;
ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxInputComponents = 64;
ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxOutputComponents = 128;
ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxInputComponents = 128;
+ ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxInputComponents = 128;
+ ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxOutputComponents = 128;
+ ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxInputComponents = 128;
+ ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxOutputComponents = 128;
}
- static const nir_shader_compiler_options nir_options = {
- .native_integers = true,
- /* In order to help allow for better CSE at the NIR level we tell NIR
- * to split all ffma instructions during opt_algebraic and we then
- * re-combine them as a later step.
- */
- .lower_ffma = true,
- .lower_sub = true,
- };
-
/* We want the GLSL compiler to emit code that uses condition codes */
for (int i = 0; i < MESA_SHADER_STAGES; i++) {
- ctx->Const.ShaderCompilerOptions[i].MaxIfDepth = brw->gen < 6 ? 16 : UINT_MAX;
- ctx->Const.ShaderCompilerOptions[i].EmitCondCodes = true;
- ctx->Const.ShaderCompilerOptions[i].EmitNoNoise = true;
- ctx->Const.ShaderCompilerOptions[i].EmitNoMainReturn = true;
- ctx->Const.ShaderCompilerOptions[i].EmitNoIndirectInput = true;
- ctx->Const.ShaderCompilerOptions[i].EmitNoIndirectOutput =
- (i == MESA_SHADER_FRAGMENT);
- ctx->Const.ShaderCompilerOptions[i].EmitNoIndirectTemp =
- (i == MESA_SHADER_FRAGMENT);
- ctx->Const.ShaderCompilerOptions[i].EmitNoIndirectUniform = false;
- ctx->Const.ShaderCompilerOptions[i].LowerClipDistance = true;
+ ctx->Const.ShaderCompilerOptions[i] =
+ brw->intelScreen->compiler->glsl_compiler_options[i];
}
- ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].OptimizeForAOS = true;
- ctx->Const.ShaderCompilerOptions[MESA_SHADER_GEOMETRY].OptimizeForAOS = true;
-
- if (brw->scalar_vs) {
- /* If we're using the scalar backend for vertex shaders, we need to
- * configure these accordingly.
- */
- ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].EmitNoIndirectOutput = true;
- ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].EmitNoIndirectTemp = true;
- ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].OptimizeForAOS = false;
-
- if (brw_env_var_as_boolean("INTEL_USE_NIR", false))
- ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].NirOptions = &nir_options;
+ if (brw->gen >= 7) {
+ ctx->Const.MaxViewportWidth = 32768;
+ ctx->Const.MaxViewportHeight = 32768;
}
- if (brw_env_var_as_boolean("INTEL_USE_NIR", true))
- ctx->Const.ShaderCompilerOptions[MESA_SHADER_FRAGMENT].NirOptions = &nir_options;
-
- ctx->Const.ShaderCompilerOptions[MESA_SHADER_COMPUTE].NirOptions = &nir_options;
-
/* ARB_viewport_array */
- if (brw->gen >= 7 && ctx->API == API_OPENGL_CORE) {
- ctx->Const.MaxViewports = GEN7_NUM_VIEWPORTS;
+ if (brw->gen >= 6 && ctx->API == API_OPENGL_CORE) {
+ ctx->Const.MaxViewports = GEN6_NUM_VIEWPORTS;
ctx->Const.ViewportSubpixelBits = 0;
/* Cast to float before negating because MaxViewportWidth is unsigned.
/* ARB_gpu_shader5 */
if (brw->gen >= 7)
ctx->Const.MaxVertexStreams = MIN2(4, MAX_VERTEX_STREAMS);
+
+ /* ARB_framebuffer_no_attachments */
+ ctx->Const.MaxFramebufferWidth = 16384;
+ ctx->Const.MaxFramebufferHeight = 16384;
+ ctx->Const.MaxFramebufferLayers = ctx->Const.MaxArrayTextureLayers;
+ ctx->Const.MaxFramebufferSamples = max_samples;
+}
+
+static void
+brw_initialize_cs_context_constants(struct brw_context *brw, unsigned max_threads)
+{
+ struct gl_context *ctx = &brw->ctx;
+
+ /* For ES, we set these constants based on SIMD8.
+ *
+ * TODO: Once we can always generate SIMD16, we should update this.
+ *
+ * For GL, we assume we can generate a SIMD16 program, but this currently
+ * is not always true. This allows us to run more test cases, and will be
+ * required based on desktop GL compute shader requirements.
+ */
+ const int simd_size = ctx->API == API_OPENGL_CORE ? 16 : 8;
+
+ const uint32_t max_invocations = simd_size * max_threads;
+ ctx->Const.MaxComputeWorkGroupSize[0] = max_invocations;
+ ctx->Const.MaxComputeWorkGroupSize[1] = max_invocations;
+ ctx->Const.MaxComputeWorkGroupSize[2] = max_invocations;
+ ctx->Const.MaxComputeWorkGroupInvocations = max_invocations;
+ ctx->Const.MaxComputeSharedMemorySize = 64 * 1024;
}
/**
ctx->Const.AllowGLSLExtensionDirectiveMidShader =
driQueryOptionb(options, "allow_glsl_extension_directive_midshader");
+
+ brw->dual_color_blend_by_location =
+ driQueryOptionb(options, "dual_color_blend_by_location");
}
GLboolean
brw->is_baytrail = devinfo->is_baytrail;
brw->is_haswell = devinfo->is_haswell;
brw->is_cherryview = devinfo->is_cherryview;
+ brw->is_broxton = devinfo->is_broxton;
brw->has_llc = devinfo->has_llc;
brw->has_hiz = devinfo->has_hiz_and_separate_stencil;
brw->has_separate_stencil = devinfo->has_hiz_and_separate_stencil;
brw->needs_unlit_centroid_workaround =
devinfo->needs_unlit_centroid_workaround;
- brw->must_use_separate_stencil = screen->hw_must_use_separate_stencil;
+ brw->must_use_separate_stencil = devinfo->must_use_separate_stencil;
brw->has_swizzling = screen->hw_has_swizzling;
brw->vs.base.stage = MESA_SHADER_VERTEX;
+ brw->tcs.base.stage = MESA_SHADER_TESS_CTRL;
+ brw->tes.base.stage = MESA_SHADER_TESS_EVAL;
brw->gs.base.stage = MESA_SHADER_GEOMETRY;
brw->wm.base.stage = MESA_SHADER_FRAGMENT;
if (brw->gen >= 8) {
_mesa_meta_init(ctx);
brw_process_driconf_options(brw);
- brw_process_intel_debug_variable(brw);
- if (brw->gen >= 8 && !(INTEL_DEBUG & DEBUG_VEC4VS))
- brw->scalar_vs = true;
+ if (INTEL_DEBUG & DEBUG_PERF)
+ brw->perf_debug = true;
+ brw_initialize_cs_context_constants(brw, devinfo->max_cs_threads);
brw_initialize_context_constants(brw);
ctx->Const.ResetStrategy = notify_reset
}
}
+ if (brw_init_pipe_control(brw, devinfo)) {
+ *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
+ intelDestroyContext(driContextPriv);
+ return false;
+ }
+
brw_init_state(brw);
intelInitExtensions(ctx);
brw->max_ds_threads = devinfo->max_ds_threads;
brw->max_gs_threads = devinfo->max_gs_threads;
brw->max_wm_threads = devinfo->max_wm_threads;
- brw->max_cs_threads = devinfo->max_cs_threads;
+ /* FINISHME: Do this for all platforms that the kernel supports */
+ if (brw->is_cherryview &&
+ screen->subslice_total > 0 && screen->eu_total > 0) {
+ /* Logical CS threads = EUs per subslice * 7 threads per EU */
+ brw->max_cs_threads = screen->eu_total / screen->subslice_total * 7;
+
+ /* Fuse configurations may give more threads than expected, never less. */
+ if (brw->max_cs_threads < devinfo->max_cs_threads)
+ brw->max_cs_threads = devinfo->max_cs_threads;
+ } else {
+ brw->max_cs_threads = devinfo->max_cs_threads;
+ }
brw->urb.size = devinfo->urb.size;
brw->urb.min_vs_entries = devinfo->urb.min_vs_entries;
brw->urb.max_vs_entries = devinfo->urb.max_vs_entries;
brw->gs.enabled = false;
brw->sf.viewport_transform_enable = true;
+ brw->predicate.state = BRW_PREDICATE_STATE_RENDER;
+
+ brw->use_resource_streamer = screen->has_resource_streamer &&
+ (env_var_as_boolean("INTEL_USE_HW_BT", false) ||
+ env_var_as_boolean("INTEL_USE_GATHER", false));
+
ctx->VertexProgram._MaintainTnlProgram = true;
ctx->FragmentProgram._MaintainTexEnvProgram = true;
}
_mesa_meta_free(&brw->ctx);
- brw_meta_fast_clear_free(brw);
if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
/* Force a report. */
if (brw->wm.base.scratch_bo)
drm_intel_bo_unreference(brw->wm.base.scratch_bo);
+ gen7_reset_hw_bt_pool_offsets(brw);
+ drm_intel_bo_unreference(brw->hw_bt_pool.bo);
+ brw->hw_bt_pool.bo = NULL;
+
drm_intel_gem_context_destroy(brw->hw_ctx);
if (ctx->swrast_context) {
if (ctx->swrast_context)
_swrast_DestroyContext(&brw->ctx);
+ brw_fini_pipe_control(brw);
intel_batchbuffer_free(brw);
drm_intel_bo_unreference(brw->throttle_batch[1]);
*/
fb->Visual.sRGBCapable = false;
for (int i = 0; i < BUFFER_COUNT; i++) {
- if (fb->Attachment[i].Renderbuffer &&
- fb->Attachment[i].Renderbuffer->Format == MESA_FORMAT_B8G8R8A8_SRGB) {
- fb->Attachment[i].Renderbuffer->Format = MESA_FORMAT_B8G8R8A8_UNORM;
- }
+ struct gl_renderbuffer *rb = fb->Attachment[i].Renderbuffer;
+ if (rb)
+ rb->Format = _mesa_get_srgb_format_linear(rb->Format);
}
}
if (rb == NULL || rb->mt == NULL)
continue;
if (rb->mt->num_samples <= 1)
- intel_miptree_resolve_color(brw, rb->mt);
+ intel_miptree_resolve_color(brw, rb->mt, 0);
else
intel_renderbuffer_downsample(brw, rb);
}
* that will happen next will probably dirty the front buffer. So
* mark it as dirty here.
*/
- if (brw_is_front_buffer_drawing(ctx->DrawBuffer))
+ if (_mesa_is_front_buffer_drawing(ctx->DrawBuffer))
brw->front_buffer_dirty = true;
}
back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT);
memset(attachments, 0, sizeof(attachments));
- if ((brw_is_front_buffer_drawing(fb) ||
- brw_is_front_buffer_reading(fb) ||
+ if ((_mesa_is_front_buffer_drawing(fb) ||
+ _mesa_is_front_buffer_reading(fb) ||
!back_rb) && front_rb) {
/* If a fake front buffer is in use, then querying for
* __DRI_BUFFER_FRONT_LEFT will cause the server to copy the image from
buffer->cpp, buffer->pitch);
}
- intel_miptree_release(&rb->mt);
bo = drm_intel_bo_gem_create_from_name(brw->bufmgr, buffer_name,
buffer->name);
if (!bo) {
drawable->w, drawable->h,
buffer->pitch);
- if (brw_is_front_buffer_drawing(fb) &&
+ if (_mesa_is_front_buffer_drawing(fb) &&
(buffer->attachment == __DRI_BUFFER_FRONT_LEFT ||
buffer->attachment == __DRI_BUFFER_FAKE_FRONT_LEFT) &&
rb->Base.Base.NumSamples > 1) {
buffer->width, buffer->height,
buffer->pitch);
- if (brw_is_front_buffer_drawing(fb) &&
+ if (_mesa_is_front_buffer_drawing(fb) &&
buffer_type == __DRI_IMAGE_BUFFER_FRONT &&
rb->Base.Base.NumSamples > 1) {
intel_renderbuffer_upsample(intel, rb);
else
return;
- if (front_rb && (brw_is_front_buffer_drawing(fb) ||
- brw_is_front_buffer_reading(fb) || !back_rb)) {
+ if (front_rb && (_mesa_is_front_buffer_drawing(fb) ||
+ _mesa_is_front_buffer_reading(fb) || !back_rb)) {
buffer_mask |= __DRI_IMAGE_BUFFER_FRONT;
}
projects / mesa.git / blobdiff