#include "brw_context.h"
#include "brw_defines.h"
+#include "brw_shader.h"
#include "brw_draw.h"
#include "brw_state.h"
#include "tnl/t_pipeline.h"
#include "util/ralloc.h"
-#include "glsl/nir/nir.h"
-
/***************************************
* Mesa's Driver Functions
***************************************/
gen6_init_queryobj_functions(functions);
else
gen4_init_queryobj_functions(functions);
+ brw_init_compute_functions(functions);
+ if (brw->gen >= 7)
+ brw_init_conditional_render_functions(functions);
functions->QuerySamplesForFormat = brw_query_samples_for_format;
ctx->Const.StripTextureBorder = true;
+ ctx->Const.MaxUniformBlockSize = 65536;
+ for (int i = 0; i < MESA_SHADER_STAGES; i++) {
+ struct gl_program_constants *prog = &ctx->Const.Program[i];
+ prog->MaxUniformBlocks = BRW_MAX_UBO;
+ prog->MaxCombinedUniformComponents =
+ prog->MaxUniformComponents +
+ ctx->Const.MaxUniformBlockSize / 4 * prog->MaxUniformBlocks;
+ }
+
ctx->Const.MaxDualSourceDrawBuffers = 1;
ctx->Const.MaxDrawBuffers = BRW_MAX_DRAW_BUFFERS;
ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits = max_samplers;
ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxTextureImageUnits = 0;
if (_mesa_extension_override_enables.ARB_compute_shader) {
ctx->Const.Program[MESA_SHADER_COMPUTE].MaxTextureImageUnits = BRW_MAX_TEX_UNIT;
- ctx->Const.MaxUniformBufferBindings += 12;
+ ctx->Const.MaxUniformBufferBindings += BRW_MAX_UBO;
} else {
ctx->Const.Program[MESA_SHADER_COMPUTE].MaxTextureImageUnits = 0;
}
ctx->Const.MinLineWidth = 1.0;
ctx->Const.MinLineWidthAA = 1.0;
- if (brw->gen >= 9 || brw->is_cherryview) {
- ctx->Const.MaxLineWidth = 40.0;
- ctx->Const.MaxLineWidthAA = 40.0;
- ctx->Const.LineWidthGranularity = 0.125;
- } else if (brw->gen >= 6) {
+ if (brw->gen >= 6) {
ctx->Const.MaxLineWidth = 7.375;
ctx->Const.MaxLineWidthAA = 7.375;
ctx->Const.LineWidthGranularity = 0.125;
ctx->Const.LineWidthGranularity = 0.5;
}
+ /* For non-antialiased lines, we have to round the line width to the
+ * nearest whole number. Make sure that we don't advertise a line
+ * width that, when rounded, will be beyond the actual hardware
+ * maximum.
+ */
+ assert(roundf(ctx->Const.MaxLineWidth) <= ctx->Const.MaxLineWidth);
+
ctx->Const.MinPointSize = 1.0;
ctx->Const.MinPointSizeAA = 1.0;
ctx->Const.MaxPointSize = 255.0;
ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxAtomicBuffers = BRW_MAX_ABO;
ctx->Const.Program[MESA_SHADER_COMPUTE].MaxAtomicBuffers = BRW_MAX_ABO;
ctx->Const.MaxCombinedAtomicBuffers = 3 * BRW_MAX_ABO;
+
+ ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxImageUniforms =
+ BRW_MAX_IMAGES;
+ ctx->Const.Program[MESA_SHADER_VERTEX].MaxImageUniforms =
+ (brw->intelScreen->compiler->scalar_vs ? BRW_MAX_IMAGES : 0);
+ ctx->Const.Program[MESA_SHADER_COMPUTE].MaxImageUniforms =
+ BRW_MAX_IMAGES;
+ ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS;
+ ctx->Const.MaxCombinedShaderOutputResources =
+ MAX_IMAGE_UNITS + BRW_MAX_DRAW_BUFFERS;
+ ctx->Const.MaxImageSamples = 0;
+ ctx->Const.MaxCombinedImageUniforms = 3 * BRW_MAX_IMAGES;
}
/* Gen6 converts quads to polygon in beginning of 3D pipeline,
* However, unaligned accesses are slower, so enforce buffer alignment.
*/
ctx->Const.UniformBufferOffsetAlignment = 16;
+
+ /* ShaderStorageBufferOffsetAlignment should be a cacheline (64 bytes) so
+ * that we can safely have the CPU and GPU writing the same SSBO on
+ * non-cachecoherent systems (our Atom CPUs). With UBOs, the GPU never
+ * writes, so there's no problem. For an SSBO, the GPU and the CPU can
+ * be updating disjoint regions of the buffer simultaneously and that will
+ * break if the regions overlap the same cacheline.
+ */
+ ctx->Const.ShaderStorageBufferOffsetAlignment = 64;
ctx->Const.TextureBufferOffsetAlignment = 16;
+ ctx->Const.MaxTextureBufferSize = 128 * 1024 * 1024;
+
+ /* FIXME: Tessellation stages are not yet supported in i965, so
+ * MaxCombinedShaderStorageBlocks doesn't take them into account.
+ */
+ ctx->Const.Program[MESA_SHADER_VERTEX].MaxShaderStorageBlocks = 12;
+ ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxShaderStorageBlocks = 12;
+ ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxShaderStorageBlocks = 0;
+ ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxShaderStorageBlocks = 0;
+ ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxShaderStorageBlocks = 12;
+ ctx->Const.Program[MESA_SHADER_COMPUTE].MaxShaderStorageBlocks = 12;
+ ctx->Const.MaxCombinedShaderStorageBlocks = 12 * 3;
+ ctx->Const.MaxShaderStorageBufferBindings = 36;
+
+ if (_mesa_extension_override_enables.ARB_compute_shader)
+ ctx->Const.MaxShaderStorageBufferBindings += 12;
if (brw->gen >= 6) {
ctx->Const.MaxVarying = 32;
ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxInputComponents = 128;
}
- static const nir_shader_compiler_options nir_options = {
- .native_integers = true,
- };
-
/* We want the GLSL compiler to emit code that uses condition codes */
for (int i = 0; i < MESA_SHADER_STAGES; i++) {
- ctx->Const.ShaderCompilerOptions[i].MaxIfDepth = brw->gen < 6 ? 16 : UINT_MAX;
- ctx->Const.ShaderCompilerOptions[i].EmitCondCodes = true;
- ctx->Const.ShaderCompilerOptions[i].EmitNoNoise = true;
- ctx->Const.ShaderCompilerOptions[i].EmitNoMainReturn = true;
- ctx->Const.ShaderCompilerOptions[i].EmitNoIndirectInput = true;
- ctx->Const.ShaderCompilerOptions[i].EmitNoIndirectOutput =
- (i == MESA_SHADER_FRAGMENT);
- ctx->Const.ShaderCompilerOptions[i].EmitNoIndirectTemp =
- (i == MESA_SHADER_FRAGMENT);
- ctx->Const.ShaderCompilerOptions[i].EmitNoIndirectUniform = false;
- ctx->Const.ShaderCompilerOptions[i].LowerClipDistance = true;
- ctx->Const.ShaderCompilerOptions[i].NirOptions = &nir_options;
- }
-
- ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].OptimizeForAOS = true;
- ctx->Const.ShaderCompilerOptions[MESA_SHADER_GEOMETRY].OptimizeForAOS = true;
-
- if (brw->scalar_vs) {
- /* If we're using the scalar backend for vertex shaders, we need to
- * configure these accordingly.
- */
- ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].EmitNoIndirectOutput = true;
- ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].EmitNoIndirectTemp = true;
- ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].OptimizeForAOS = false;
+ ctx->Const.ShaderCompilerOptions[i] =
+ brw->intelScreen->compiler->glsl_compiler_options[i];
}
/* ARB_viewport_array */
- if (brw->gen >= 7 && ctx->API == API_OPENGL_CORE) {
- ctx->Const.MaxViewports = GEN7_NUM_VIEWPORTS;
+ if (brw->gen >= 6 && ctx->API == API_OPENGL_CORE) {
+ ctx->Const.MaxViewports = GEN6_NUM_VIEWPORTS;
ctx->Const.ViewportSubpixelBits = 0;
- /* Cast to float before negating becuase MaxViewportWidth is unsigned.
+ /* Cast to float before negating because MaxViewportWidth is unsigned.
*/
ctx->Const.ViewportBounds.Min = -(float)ctx->Const.MaxViewportWidth;
ctx->Const.ViewportBounds.Max = ctx->Const.MaxViewportWidth;
/* ARB_gpu_shader5 */
if (brw->gen >= 7)
ctx->Const.MaxVertexStreams = MIN2(4, MAX_VERTEX_STREAMS);
+
+ /* ARB_framebuffer_no_attachments */
+ ctx->Const.MaxFramebufferWidth = ctx->Const.MaxViewportWidth;
+ ctx->Const.MaxFramebufferHeight = ctx->Const.MaxViewportHeight;
+ ctx->Const.MaxFramebufferLayers = ctx->Const.MaxArrayTextureLayers;
+ ctx->Const.MaxFramebufferSamples = max_samples;
+}
+
+static void
+brw_adjust_cs_context_constants(struct brw_context *brw)
+{
+ struct gl_context *ctx = &brw->ctx;
+
+ /* For ES, we set these constants based on SIMD8.
+ *
+ * TODO: Once we can always generate SIMD16, we should update this.
+ *
+ * For GL, we assume we can generate a SIMD16 program, but this currently
+ * is not always true. This allows us to run more test cases, and will be
+ * required based on desktop GL compute shader requirements.
+ */
+ const int simd_size = ctx->API == API_OPENGL_CORE ? 16 : 8;
+
+ const uint32_t max_invocations = simd_size * brw->max_cs_threads;
+ ctx->Const.MaxComputeWorkGroupSize[0] = max_invocations;
+ ctx->Const.MaxComputeWorkGroupSize[1] = max_invocations;
+ ctx->Const.MaxComputeWorkGroupSize[2] = max_invocations;
+ ctx->Const.MaxComputeWorkGroupInvocations = max_invocations;
}
/**
driQueryOptionb(options, "allow_glsl_extension_directive_midshader");
}
-/* drop when libdrm 2.4.61 is released */
-#ifndef I915_PARAM_REVISION
-#define I915_PARAM_REVISION 32
-#endif
-
-static int
-brw_get_revision(int fd)
-{
- struct drm_i915_getparam gp;
- int revision;
- int ret;
-
- memset(&gp, 0, sizeof(gp));
- gp.param = I915_PARAM_REVISION;
- gp.value = &revision;
-
- ret = drmCommandWriteRead(fd, DRM_I915_GETPARAM, &gp, sizeof(gp));
- if (ret)
- revision = -1;
-
- return revision;
-}
-
GLboolean
brwCreateContext(gl_api api,
const struct gl_config *mesaVis,
struct brw_context *brw = rzalloc(NULL, struct brw_context);
if (!brw) {
- fprintf(stderr, "%s: failed to alloc context\n", __FUNCTION__);
+ fprintf(stderr, "%s: failed to alloc context\n", __func__);
*dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
return false;
}
brw->is_baytrail = devinfo->is_baytrail;
brw->is_haswell = devinfo->is_haswell;
brw->is_cherryview = devinfo->is_cherryview;
+ brw->is_broxton = devinfo->is_broxton;
brw->has_llc = devinfo->has_llc;
brw->has_hiz = devinfo->has_hiz_and_separate_stencil;
brw->has_separate_stencil = devinfo->has_hiz_and_separate_stencil;
brw->has_negative_rhw_bug = devinfo->has_negative_rhw_bug;
brw->needs_unlit_centroid_workaround =
devinfo->needs_unlit_centroid_workaround;
- brw->revision = brw_get_revision(sPriv->fd);
brw->must_use_separate_stencil = screen->hw_must_use_separate_stencil;
brw->has_swizzling = screen->hw_has_swizzling;
if (!_mesa_initialize_context(ctx, api, mesaVis, shareCtx, &functions)) {
*dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
- fprintf(stderr, "%s: failed to init mesa context\n", __FUNCTION__);
+ fprintf(stderr, "%s: failed to init mesa context\n", __func__);
intelDestroyContext(driContextPriv);
return false;
}
_mesa_meta_init(ctx);
brw_process_driconf_options(brw);
- brw_process_intel_debug_variable(brw);
- if (brw->gen >= 8 && !(INTEL_DEBUG & DEBUG_VEC4VS))
- brw->scalar_vs = true;
+ if (INTEL_DEBUG & DEBUG_PERF)
+ brw->perf_debug = true;
brw_initialize_context_constants(brw);
}
}
+ if (brw_init_pipe_control(brw, devinfo)) {
+ *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
+ intelDestroyContext(driContextPriv);
+ return false;
+ }
+
brw_init_state(brw);
intelInitExtensions(ctx);
brw->max_ds_threads = devinfo->max_ds_threads;
brw->max_gs_threads = devinfo->max_gs_threads;
brw->max_wm_threads = devinfo->max_wm_threads;
+ brw->max_cs_threads = devinfo->max_cs_threads;
brw->urb.size = devinfo->urb.size;
brw->urb.min_vs_entries = devinfo->urb.min_vs_entries;
brw->urb.max_vs_entries = devinfo->urb.max_vs_entries;
brw->urb.max_ds_entries = devinfo->urb.max_ds_entries;
brw->urb.max_gs_entries = devinfo->urb.max_gs_entries;
+ brw_adjust_cs_context_constants(brw);
+
/* Estimate the size of the mappable aperture into the GTT. There's an
* ioctl to get the whole GTT size, but not one to get the mappable subset.
* It turns out it's basically always 256MB, though some ancient hardware
brw->gs.enabled = false;
brw->sf.viewport_transform_enable = true;
+ brw->predicate.state = BRW_PREDICATE_STATE_RENDER;
+
+ brw->use_resource_streamer = screen->has_resource_streamer &&
+ (brw_env_var_as_boolean("INTEL_USE_HW_BT", false) ||
+ brw_env_var_as_boolean("INTEL_USE_GATHER", false));
+
ctx->VertexProgram._MaintainTnlProgram = true;
ctx->FragmentProgram._MaintainTexEnvProgram = true;
(struct brw_context *) driContextPriv->driverPrivate;
struct gl_context *ctx = &brw->ctx;
- assert(brw); /* should never be null */
- if (!brw)
- return;
-
/* Dump a final BMP in case the application doesn't call SwapBuffers */
if (INTEL_DEBUG & DEBUG_AUB) {
intel_batchbuffer_flush(brw);
if (brw->wm.base.scratch_bo)
drm_intel_bo_unreference(brw->wm.base.scratch_bo);
+ gen7_reset_hw_bt_pool_offsets(brw);
+ drm_intel_bo_unreference(brw->hw_bt_pool.bo);
+ brw->hw_bt_pool.bo = NULL;
+
drm_intel_gem_context_destroy(brw->hw_ctx);
if (ctx->swrast_context) {
if (ctx->swrast_context)
_swrast_DestroyContext(&brw->ctx);
+ brw_fini_pipe_control(brw);
intel_batchbuffer_free(brw);
drm_intel_bo_unreference(brw->throttle_batch[1]);
* sRGB encode if the renderbuffer can handle it. You can ask specifically
* for a visual where you're guaranteed to be capable, but it turns out that
* everyone just makes all their ARGB8888 visuals capable and doesn't offer
- * incapable ones, becuase there's no difference between the two in resources
+ * incapable ones, because there's no difference between the two in resources
* used. Applications thus get built that accidentally rely on the default
* visual choice being sRGB, so we make ours sRGB capable. Everything sounds
* great...
buffer->cpp, buffer->pitch);
}
- intel_miptree_release(&rb->mt);
bo = drm_intel_bo_gem_create_from_name(brw->bufmgr, buffer_name,
buffer->name);
if (!bo) {