i965: Add HiZ operation state to brw_context

[mesa.git] / src / mesa / drivers / dri / i965 / brw_context.c

diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 502b023a270c2be47ed8c36ebaed0d80fe42565d..9b506a6529fe7f862419919f2e2d9a53989d9ee6 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -31,7 +31,6 @@
 
 
 #include "main/imports.h"
-#include "main/api_noop.h"
 #include "main/macros.h"
 #include "main/simple_list.h"
 #include "brw_context.h"
@@ -71,7 +70,6 @@ brwCreateContext(int api,
       return false;
    }
 
-   brwInitVtbl( brw );
    brwInitDriverFunctions( &functions );
 
    if (!intelInitContext( intel, api, mesaVis, driContextPriv,
@@ -81,6 +79,8 @@ brwCreateContext(int api,
       return false;
    }
 
+   brwInitVtbl( brw );
+
    /* Initialize swrast, tnl driver tables: */
    intelInitSpanFuncs(ctx);
 
@@ -115,6 +115,7 @@ brwCreateContext(int api,
 
    /* We want the GLSL compiler to emit code that uses condition codes */
    for (i = 0; i <= MESA_SHADER_FRAGMENT; i++) {
+      ctx->ShaderCompilerOptions[i].MaxIfDepth = intel->gen < 6 ? 16 : UINT_MAX;
       ctx->ShaderCompilerOptions[i].EmitCondCodes = true;
       ctx->ShaderCompilerOptions[i].EmitNVTempInitialization = true;
       ctx->ShaderCompilerOptions[i].EmitNoNoise = true;
@@ -188,14 +189,16 @@ brwCreateContext(int api,
    /* WM maximum threads is number of EUs times number of threads per EU. */
    if (intel->gen >= 7) {
       if (intel->gt == 1) {
-        brw->wm_max_threads = 86;
-        brw->vs_max_threads = 36;
+        brw->max_wm_threads = 86;
+        brw->max_vs_threads = 36;
+        brw->max_gs_threads = 36;
         brw->urb.size = 128;
         brw->urb.max_vs_entries = 512;
         brw->urb.max_gs_entries = 192;
       } else if (intel->gt == 2) {
-        brw->wm_max_threads = 86;
-        brw->vs_max_threads = 128;
+        brw->max_wm_threads = 86;
+        brw->max_vs_threads = 128;
+        brw->max_gs_threads = 128;
         brw->urb.size = 256;
         brw->urb.max_vs_entries = 704;
         brw->urb.max_gs_entries = 320;
@@ -208,36 +211,36 @@ brwCreateContext(int api,
          * disabling of WIZ hashing (bit 6 of GT_MODE, 0x20d0) and a
          * GPU reset to change.
          */
-        brw->wm_max_threads = 40;
-        brw->vs_max_threads = 60;
+        brw->max_wm_threads = 40;
+        brw->max_vs_threads = 60;
+        brw->max_gs_threads = 60;
         brw->urb.size = 64;            /* volume 5c.5 section 5.1 */
         brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
       } else {
-        brw->wm_max_threads = 40;
-        brw->vs_max_threads = 24;
+        brw->max_wm_threads = 40;
+        brw->max_vs_threads = 24;
+        brw->max_gs_threads = 21; /* conservative; 24 if rendering disabled */
         brw->urb.size = 32;            /* volume 5c.5 section 5.1 */
         brw->urb.max_vs_entries = 128; /* volume 2a (see 3DSTATE_URB) */
       }
    } else if (intel->gen == 5) {
       brw->urb.size = 1024;
-      brw->vs_max_threads = 72;
-      brw->wm_max_threads = 12 * 6;
+      brw->max_vs_threads = 72;
+      brw->max_gs_threads = 32;
+      brw->max_wm_threads = 12 * 6;
    } else if (intel->is_g4x) {
       brw->urb.size = 384;
-      brw->vs_max_threads = 32;
-      brw->wm_max_threads = 10 * 5;
+      brw->max_vs_threads = 32;
+      brw->max_gs_threads = 2;
+      brw->max_wm_threads = 10 * 5;
    } else if (intel->gen < 6) {
       brw->urb.size = 256;
-      brw->vs_max_threads = 16;
-      brw->wm_max_threads = 8 * 4;
+      brw->max_vs_threads = 16;
+      brw->max_gs_threads = 2;
+      brw->max_wm_threads = 8 * 4;
       brw->has_negative_rhw_bug = true;
    }
 
-   if (INTEL_DEBUG & DEBUG_SINGLE_THREAD) {
-      brw->vs_max_threads = 1;
-      brw->wm_max_threads = 1;
-   }
-
    brw_init_state( brw );
 
    brw->curbe.last_buf = calloc(1, 4096);