* enabled, it first passes them to a VS thread which is a good place
* for the driver to implement any active vertex shader.
*
+ * HS - Hull Shader (Tessellation Control Shader)
+ *
+ * TE - Tessellation Engine (Tessellation Primitive Generation)
+ *
+ * DS - Domain Shader (Tessellation Evaluation Shader)
+ *
* GS - Geometry Shader. This corresponds to a new DX10 concept. If
* enabled, incoming strips etc are passed to GS threads in individual
* line/triangle/point units. The GS thread may perform arbitary
BRW_CACHE_VS_PROG,
BRW_CACHE_FF_GS_PROG,
BRW_CACHE_GS_PROG,
+ BRW_CACHE_TCS_PROG,
+ BRW_CACHE_TES_PROG,
BRW_CACHE_CLIP_PROG,
BRW_CACHE_CS_PROG,
BRW_STATE_URB_FENCE = BRW_MAX_CACHE,
BRW_STATE_FRAGMENT_PROGRAM,
BRW_STATE_GEOMETRY_PROGRAM,
+ BRW_STATE_TESS_CTRL_PROGRAM,
+ BRW_STATE_TESS_EVAL_PROGRAM,
BRW_STATE_VERTEX_PROGRAM,
BRW_STATE_CURBE_OFFSETS,
BRW_STATE_REDUCED_PRIMITIVE,
+ BRW_STATE_PATCH_PRIMITIVE,
BRW_STATE_PRIMITIVE,
BRW_STATE_CONTEXT,
BRW_STATE_PSP,
BRW_STATE_BATCH,
BRW_STATE_INDEX_BUFFER,
BRW_STATE_VS_CONSTBUF,
+ BRW_STATE_TCS_CONSTBUF,
+ BRW_STATE_TES_CONSTBUF,
BRW_STATE_GS_CONSTBUF,
BRW_STATE_PROGRAM_CACHE,
BRW_STATE_STATE_BASE_ADDRESS,
BRW_STATE_VS_ATTRIB_WORKAROUNDS,
BRW_STATE_COMPUTE_PROGRAM,
BRW_STATE_CS_WORK_GROUPS,
+ BRW_STATE_URB_SIZE,
BRW_NUM_STATE_BITS
};
#define BRW_NEW_VS_PROG_DATA (1ull << BRW_CACHE_VS_PROG)
#define BRW_NEW_FF_GS_PROG_DATA (1ull << BRW_CACHE_FF_GS_PROG)
#define BRW_NEW_GS_PROG_DATA (1ull << BRW_CACHE_GS_PROG)
+#define BRW_NEW_TCS_PROG_DATA (1ull << BRW_CACHE_TCS_PROG)
+#define BRW_NEW_TES_PROG_DATA (1ull << BRW_CACHE_TES_PROG)
#define BRW_NEW_CLIP_PROG_DATA (1ull << BRW_CACHE_CLIP_PROG)
#define BRW_NEW_CS_PROG_DATA (1ull << BRW_CACHE_CS_PROG)
#define BRW_NEW_URB_FENCE (1ull << BRW_STATE_URB_FENCE)
#define BRW_NEW_FRAGMENT_PROGRAM (1ull << BRW_STATE_FRAGMENT_PROGRAM)
#define BRW_NEW_GEOMETRY_PROGRAM (1ull << BRW_STATE_GEOMETRY_PROGRAM)
+#define BRW_NEW_TESS_EVAL_PROGRAM (1ull << BRW_STATE_TESS_EVAL_PROGRAM)
+#define BRW_NEW_TESS_CTRL_PROGRAM (1ull << BRW_STATE_TESS_CTRL_PROGRAM)
#define BRW_NEW_VERTEX_PROGRAM (1ull << BRW_STATE_VERTEX_PROGRAM)
#define BRW_NEW_CURBE_OFFSETS (1ull << BRW_STATE_CURBE_OFFSETS)
#define BRW_NEW_REDUCED_PRIMITIVE (1ull << BRW_STATE_REDUCED_PRIMITIVE)
+#define BRW_NEW_PATCH_PRIMITIVE (1ull << BRW_STATE_PATCH_PRIMITIVE)
#define BRW_NEW_PRIMITIVE (1ull << BRW_STATE_PRIMITIVE)
#define BRW_NEW_CONTEXT (1ull << BRW_STATE_CONTEXT)
#define BRW_NEW_PSP (1ull << BRW_STATE_PSP)
/** \see brw.state.depth_region */
#define BRW_NEW_INDEX_BUFFER (1ull << BRW_STATE_INDEX_BUFFER)
#define BRW_NEW_VS_CONSTBUF (1ull << BRW_STATE_VS_CONSTBUF)
+#define BRW_NEW_TCS_CONSTBUF (1ull << BRW_STATE_TCS_CONSTBUF)
+#define BRW_NEW_TES_CONSTBUF (1ull << BRW_STATE_TES_CONSTBUF)
#define BRW_NEW_GS_CONSTBUF (1ull << BRW_STATE_GS_CONSTBUF)
#define BRW_NEW_PROGRAM_CACHE (1ull << BRW_STATE_PROGRAM_CACHE)
#define BRW_NEW_STATE_BASE_ADDRESS (1ull << BRW_STATE_STATE_BASE_ADDRESS)
#define BRW_NEW_VS_ATTRIB_WORKAROUNDS (1ull << BRW_STATE_VS_ATTRIB_WORKAROUNDS)
#define BRW_NEW_COMPUTE_PROGRAM (1ull << BRW_STATE_COMPUTE_PROGRAM)
#define BRW_NEW_CS_WORK_GROUPS (1ull << BRW_STATE_CS_WORK_GROUPS)
+#define BRW_NEW_URB_SIZE (1ull << BRW_STATE_URB_SIZE)
struct brw_state_flags {
/** State update flags signalled by mesa internals */
};
+/** Subclass of Mesa tessellation control program */
+struct brw_tess_ctrl_program {
+ struct gl_tess_ctrl_program program;
+ unsigned id; /**< serial no. to identify tess ctrl progs, never re-used */
+};
+
+
+/** Subclass of Mesa tessellation evaluation program */
+struct brw_tess_eval_program {
+ struct gl_tess_eval_program program;
+ unsigned id; /**< serial no. to identify tess eval progs, never re-used */
+};
+
+
/** Subclass of Mesa geometry program */
struct brw_geometry_program {
struct gl_geometry_program program;
struct shader_times;
+struct brw_l3_config;
+
/**
* brw_context is derived from gl_context.
*/
bool use_rep_send;
bool use_resource_streamer;
+ /**
+ * Whether LRI can be used to write register values from the batch buffer.
+ */
+ bool can_do_pipelined_register_writes;
+
/**
* Some versions of Gen hardware don't do centroid interpolation correctly
* on unlit pixels, causing incorrect values for derivatives near triangle
*/
const struct gl_vertex_program *vertex_program;
const struct gl_geometry_program *geometry_program;
+ const struct gl_tess_ctrl_program *tess_ctrl_program;
+ const struct gl_tess_eval_program *tess_eval_program;
const struct gl_fragment_program *fragment_program;
const struct gl_compute_program *compute_program;
GLuint clip_start;
GLuint sf_start;
GLuint cs_start;
- GLuint size; /* Hardware URB size, in KB. */
+ /**
+ * URB size in the current configuration. The units this is expressed
+ * in are somewhat inconsistent, see brw_device_info::urb::size.
+ *
+ * FINISHME: Represent the URB size consistently in KB on all platforms.
+ */
+ GLuint size;
/* True if the most recently sent _3DSTATE_URB message allocated
* URB space for the GS.
struct brw_vs_prog_data *prog_data;
} vs;
+ struct {
+ struct brw_stage_state base;
+ struct brw_tcs_prog_data *prog_data;
+
+ /**
+ * True if the 3DSTATE_HS command most recently emitted to the 3D
+ * pipeline enabled the HS; false otherwise.
+ */
+ bool enabled;
+ } tcs;
+
+ struct {
+ struct brw_stage_state base;
+ struct brw_tes_prog_data *prog_data;
+
+ /**
+ * True if the 3DSTATE_DS command most recently emitted to the 3D
+ * pipeline enabled the DS; false otherwise.
+ */
+ bool enabled;
+ } tes;
+
struct {
struct brw_stage_state base;
struct brw_gs_prog_data *prog_data;
} perfmon;
int num_atoms[BRW_NUM_PIPELINES];
- const struct brw_tracked_state render_atoms[60];
- const struct brw_tracked_state compute_atoms[9];
+ const struct brw_tracked_state render_atoms[76];
+ const struct brw_tracked_state compute_atoms[10];
/* If (INTEL_DEBUG & DEBUG_BATCH) */
struct {
uint32_t num_instances;
int basevertex;
+ struct {
+ const struct brw_l3_config *config;
+ } l3;
+
struct {
drm_intel_bo *bo;
const char **names;
drm_intel_bo *bo,
uint32_t offset,
uint32_t size,
- uint32_t *out_offset,
- bool dword_pitch);
+ uint32_t *out_offset);
void brw_create_buffer_surface(struct brw_context *brw,
drm_intel_bo *bo,
uint32_t offset,
uint32_t size,
- uint32_t *out_offset,
- bool dword_pitch);
+ uint32_t *out_offset);
void brw_update_buffer_texture_surface(struct gl_context *ctx,
unsigned unit,
uint32_t *surf_offset);
void brw_upload_ubo_surfaces(struct brw_context *brw,
struct gl_shader *shader,
struct brw_stage_state *stage_state,
- struct brw_stage_prog_data *prog_data,
- bool dword_pitch);
+ struct brw_stage_prog_data *prog_data);
void brw_upload_abo_surfaces(struct brw_context *brw,
struct gl_shader *shader,
struct brw_stage_state *stage_state,