struct brw_context;
struct brw_instruction;
struct brw_vs_prog_key;
+struct brw_vec4_prog_key;
struct brw_wm_prog_key;
struct brw_wm_prog_data;
enum brw_state_id {
BRW_STATE_URB_FENCE,
BRW_STATE_FRAGMENT_PROGRAM,
+ BRW_STATE_GEOMETRY_PROGRAM,
BRW_STATE_VERTEX_PROGRAM,
BRW_STATE_CURBE_OFFSETS,
BRW_STATE_REDUCED_PRIMITIVE,
BRW_STATE_BATCH,
BRW_STATE_INDEX_BUFFER,
BRW_STATE_VS_CONSTBUF,
+ BRW_STATE_GS_CONSTBUF,
BRW_STATE_PROGRAM_CACHE,
BRW_STATE_STATE_BASE_ADDRESS,
+ BRW_STATE_VUE_MAP_VS,
BRW_STATE_VUE_MAP_GEOM_OUT,
BRW_STATE_TRANSFORM_FEEDBACK,
BRW_STATE_RASTERIZER_DISCARD,
BRW_STATE_STATS_WM,
BRW_STATE_UNIFORM_BUFFER,
BRW_STATE_META_IN_PROGRESS,
+ BRW_STATE_INTERPOLATION_MAP,
+ BRW_STATE_PUSH_CONSTANT_ALLOCATION,
+ BRW_NUM_STATE_BITS
};
#define BRW_NEW_URB_FENCE (1 << BRW_STATE_URB_FENCE)
#define BRW_NEW_FRAGMENT_PROGRAM (1 << BRW_STATE_FRAGMENT_PROGRAM)
+#define BRW_NEW_GEOMETRY_PROGRAM (1 << BRW_STATE_GEOMETRY_PROGRAM)
#define BRW_NEW_VERTEX_PROGRAM (1 << BRW_STATE_VERTEX_PROGRAM)
#define BRW_NEW_CURBE_OFFSETS (1 << BRW_STATE_CURBE_OFFSETS)
#define BRW_NEW_REDUCED_PRIMITIVE (1 << BRW_STATE_REDUCED_PRIMITIVE)
/** \see brw.state.depth_region */
#define BRW_NEW_INDEX_BUFFER (1 << BRW_STATE_INDEX_BUFFER)
#define BRW_NEW_VS_CONSTBUF (1 << BRW_STATE_VS_CONSTBUF)
+#define BRW_NEW_GS_CONSTBUF (1 << BRW_STATE_GS_CONSTBUF)
#define BRW_NEW_PROGRAM_CACHE (1 << BRW_STATE_PROGRAM_CACHE)
#define BRW_NEW_STATE_BASE_ADDRESS (1 << BRW_STATE_STATE_BASE_ADDRESS)
+#define BRW_NEW_VUE_MAP_VS (1 << BRW_STATE_VUE_MAP_VS)
#define BRW_NEW_VUE_MAP_GEOM_OUT (1 << BRW_STATE_VUE_MAP_GEOM_OUT)
#define BRW_NEW_TRANSFORM_FEEDBACK (1 << BRW_STATE_TRANSFORM_FEEDBACK)
#define BRW_NEW_RASTERIZER_DISCARD (1 << BRW_STATE_RASTERIZER_DISCARD)
#define BRW_NEW_STATS_WM (1 << BRW_STATE_STATS_WM)
#define BRW_NEW_UNIFORM_BUFFER (1 << BRW_STATE_UNIFORM_BUFFER)
#define BRW_NEW_META_IN_PROGRESS (1 << BRW_STATE_META_IN_PROGRESS)
+#define BRW_NEW_INTERPOLATION_MAP (1 << BRW_STATE_INTERPOLATION_MAP)
+#define BRW_NEW_PUSH_CONSTANT_ALLOCATION (1 << BRW_STATE_PUSH_CONSTANT_ALLOCATION)
struct brw_state_flags {
/** State update flags signalled by mesa internals */
};
+/** Subclass of Mesa geometry program */
+struct brw_geometry_program {
+ struct gl_geometry_program program;
+ unsigned id; /**< serial no. to identify geom progs, never re-used */
+};
+
+
/** Subclass of Mesa fragment program */
struct brw_fragment_program {
struct gl_fragment_program program;
GLuint reg_blocks_16;
GLuint total_scratch;
+ unsigned binding_table_size;
+
GLuint nr_params; /**< number of float params/constants */
GLuint nr_pull_params;
bool dual_src_blend;
GLbitfield64 slots_valid, bool userclip_active);
+/*
+ * Mapping of VUE map slots to interpolation modes.
+ */
+struct interpolation_mode_map {
+ unsigned char mode[BRW_VARYING_SLOT_COUNT];
+};
+
+static inline bool brw_any_flat_varyings(struct interpolation_mode_map *map)
+{
+ for (int i = 0; i < BRW_VARYING_SLOT_COUNT; i++)
+ if (map->mode[i] == INTERP_QUALIFIER_FLAT)
+ return true;
+
+ return false;
+}
+
+static inline bool brw_any_noperspective_varyings(struct interpolation_mode_map *map)
+{
+ for (int i = 0; i < BRW_VARYING_SLOT_COUNT; i++)
+ if (map->mode[i] == INTERP_QUALIFIER_NOPERSPECTIVE)
+ return true;
+
+ return false;
+}
+
+
struct brw_sf_prog_data {
GLuint urb_read_length;
GLuint total_grf;
GLuint total_grf;
};
-struct brw_gs_prog_data {
+struct brw_ff_gs_prog_data {
GLuint urb_read_length;
GLuint total_grf;
struct brw_vec4_prog_data {
struct brw_vue_map vue_map;
+ /**
+ * Register where the thread expects to find input data from the URB
+ * (typically uniforms, followed by per-vertex inputs).
+ */
+ unsigned dispatch_grf_start_reg;
+
GLuint curb_read_length;
GLuint urb_read_length;
GLuint total_grf;
*/
GLuint urb_entry_size;
- int num_surfaces;
+ unsigned binding_table_size;
/* These pointers must appear last. See brw_vec4_prog_data_compare(). */
const float **param;
bool uses_vertexid;
};
+
+/* Note: brw_gs_prog_data_compare() must be updated when adding fields to
+ * this struct!
+ */
+struct brw_gs_prog_data
+{
+ struct brw_vec4_prog_data base;
+
+ /**
+ * Size of an output vertex, measured in HWORDS (32 bytes).
+ */
+ unsigned output_vertex_size_hwords;
+
+ unsigned output_topology;
+};
+
/** Number of texture sampler units */
#define BRW_MAX_TEX_UNIT 16
* | 36 | UBO 11 |
* +-------------------------------+
*
- * Our VS binding tables are programmed as follows:
+ * Our VS (and Gen7 GS) binding tables are programmed as follows:
*
* +-----+-------------------------+
- * | 0 | VS Pull Constant Buffer |
+ * | 0 | Pull Constant Buffer |
* +-----+-------------------------+
* | 1 | Texture 0 |
* | . | . |
* | : | : |
* | 63 | SOL Binding 63 |
* +-----+-------------------------+
- *
- * Note that nothing actually uses the SURF_INDEX_DRAW macro, so it has to be
- * the identity function or things will break. We do want to keep draw buffers
- * first so we can use headerless render target writes for RT 0.
*/
#define SURF_INDEX_DRAW(d) (d)
#define SURF_INDEX_FRAG_CONST_BUFFER (BRW_MAX_DRAW_BUFFERS + 1)
/** Maximum size of the binding table. */
#define BRW_MAX_WM_SURFACES (SURF_INDEX_WM_SHADER_TIME + 1)
-#define SURF_INDEX_VERT_CONST_BUFFER (0)
-#define SURF_INDEX_VS_TEXTURE(t) (SURF_INDEX_VERT_CONST_BUFFER + 1 + (t))
-#define SURF_INDEX_VS_UBO(u) (SURF_INDEX_VS_TEXTURE(BRW_MAX_TEX_UNIT) + u)
-#define SURF_INDEX_VS_SHADER_TIME (SURF_INDEX_VS_UBO(12))
-#define BRW_MAX_VS_SURFACES (SURF_INDEX_VS_SHADER_TIME + 1)
+#define SURF_INDEX_VEC4_CONST_BUFFER (0)
+#define SURF_INDEX_VEC4_TEXTURE(t) (SURF_INDEX_VEC4_CONST_BUFFER + 1 + (t))
+#define SURF_INDEX_VEC4_UBO(u) (SURF_INDEX_VEC4_TEXTURE(BRW_MAX_TEX_UNIT) + u)
+#define SURF_INDEX_VEC4_SHADER_TIME (SURF_INDEX_VEC4_UBO(12))
+#define BRW_MAX_VEC4_SURFACES (SURF_INDEX_VEC4_SHADER_TIME + 1)
-#define SURF_INDEX_SOL_BINDING(t) ((t))
-#define BRW_MAX_GS_SURFACES SURF_INDEX_SOL_BINDING(BRW_MAX_SOL_BINDINGS)
+#define SURF_INDEX_GEN6_SOL_BINDING(t) (t)
+#define BRW_MAX_GEN6_GS_SURFACES SURF_INDEX_GEN6_SOL_BINDING(BRW_MAX_SOL_BINDINGS)
/**
* Stride in bytes between shader_time entries.
BRW_SF_UNIT, /* scissor state on gen6 */
BRW_VS_UNIT,
BRW_VS_PROG,
- BRW_GS_UNIT,
+ BRW_FF_GS_UNIT,
+ BRW_FF_GS_PROG,
BRW_GS_PROG,
BRW_CLIP_VP,
BRW_CLIP_UNIT,
#define CACHE_NEW_SF_UNIT (1<<BRW_SF_UNIT)
#define CACHE_NEW_VS_UNIT (1<<BRW_VS_UNIT)
#define CACHE_NEW_VS_PROG (1<<BRW_VS_PROG)
-#define CACHE_NEW_GS_UNIT (1<<BRW_GS_UNIT)
+#define CACHE_NEW_FF_GS_UNIT (1<<BRW_FF_GS_UNIT)
+#define CACHE_NEW_FF_GS_PROG (1<<BRW_FF_GS_PROG)
#define CACHE_NEW_GS_PROG (1<<BRW_GS_PROG)
#define CACHE_NEW_CLIP_VP (1<<BRW_CLIP_VP)
#define CACHE_NEW_CLIP_UNIT (1<<BRW_CLIP_UNIT)
struct brw_cached_batch_item *next;
};
-
-
-/* Protect against a future where VERT_ATTRIB_MAX > 32. Wouldn't life
- * be easier if C allowed arrays of packed elements?
- */
-#define ATTRIB_BIT_DWORDS ((VERT_ATTRIB_MAX+31)/32)
-
struct brw_vertex_buffer {
/** Buffer object containing the uploaded vertex data */
drm_intel_bo *bo;
/**
- * brw_context is derived from intel_context.
+ * Data shared between brw_context::vs and brw_context::gs
+ */
+struct brw_stage_state
+{
+ drm_intel_bo *scratch_bo;
+ drm_intel_bo *const_bo;
+ /** Offset in the program cache to the program */
+ uint32_t prog_offset;
+ uint32_t state_offset;
+
+ uint32_t push_const_offset; /* Offset in the batchbuffer */
+ int push_const_size; /* in 256-bit register increments */
+
+ uint32_t bind_bo_offset;
+ uint32_t surf_offset[BRW_MAX_VEC4_SURFACES];
+
+ /** SAMPLER_STATE count and table offset */
+ uint32_t sampler_count;
+ uint32_t sampler_offset;
+
+ /** Offsets in the batch to sampler default colors (texture border color) */
+ uint32_t sdc_offset[BRW_MAX_TEX_UNIT];
+};
+
+
+/**
+ * brw_context is derived from gl_context.
*/
struct brw_context
{
- struct intel_context intel; /**< base class, must be first field */
+ struct gl_context ctx; /**< base class, must be first field */
struct
{
void (*update_texture_surface)(struct gl_context *ctx,
unsigned unit,
- uint32_t *binding_table,
- unsigned surf_index);
+ uint32_t *surf_offset);
void (*update_renderbuffer_surface)(struct brw_context *brw,
struct gl_renderbuffer *rb,
bool layered,
uint32_t *out_offset,
bool dword_pitch);
+ /** Upload a SAMPLER_STATE table. */
+ void (*upload_sampler_state_table)(struct brw_context *brw,
+ struct gl_program *prog,
+ uint32_t sampler_count,
+ uint32_t *sst_offset,
+ uint32_t *sdc_offset);
+
/**
* Send the appropriate state packets to configure depth, stencil, and
* HiZ buffers (i965+ only)
uint32_t max_gtt_map_object_size;
bool emit_state_always;
+
+ int gen;
+ int gt;
+
+ bool is_g4x;
+ bool is_baytrail;
+ bool is_haswell;
+
+ bool has_hiz;
+ bool has_separate_stencil;
+ bool must_use_separate_stencil;
+ bool has_llc;
bool has_swizzling;
bool has_surface_tile_offset;
bool has_compr4;
/* Active vertex program:
*/
const struct gl_vertex_program *vertex_program;
+ const struct gl_geometry_program *geometry_program;
const struct gl_fragment_program *fragment_program;
/* hw-dependent 3DSTATE_VF_STATISTICS opcode */
bool constrained;
+ GLuint min_vs_entries; /* Minimum number of VS entries */
GLuint max_vs_entries; /* Maximum number of VS entries */
GLuint max_gs_entries; /* Maximum number of GS entries */
GLuint last_bufsz;
} curbe;
- /** SAMPLER_STATE count and offset */
- struct {
- GLuint count;
- uint32_t offset;
- } sampler;
+ /**
+ * Layout of vertex data exiting the vertex shader.
+ *
+ * BRW_NEW_VUE_MAP_VS is flagged when this VUE map changes.
+ */
+ struct brw_vue_map vue_map_vs;
/**
* Layout of vertex data exiting the geometry portion of the pipleine.
*/
struct brw_vue_map vue_map_geom_out;
+ /**
+ * Data structures used by all vec4 program compiles (not specific to any
+ * particular program).
+ */
struct {
- struct brw_vs_prog_data *prog_data;
-
- drm_intel_bo *scratch_bo;
- drm_intel_bo *const_bo;
- /** Offset in the program cache to the VS program */
- uint32_t prog_offset;
- uint32_t state_offset;
-
- uint32_t push_const_offset; /* Offset in the batchbuffer */
- int push_const_size; /* in 256-bit register increments */
-
- /** @{ register allocator */
-
struct ra_regs *regs;
/**
* GRF for that object.
*/
uint8_t *ra_reg_to_grf;
- /** @} */
+ } vec4;
- uint32_t bind_bo_offset;
- uint32_t surf_offset[BRW_MAX_VS_SURFACES];
+ struct {
+ struct brw_stage_state base;
+ struct brw_vs_prog_data *prog_data;
} vs;
struct {
+ struct brw_stage_state base;
struct brw_gs_prog_data *prog_data;
+ } gs;
+
+ struct {
+ struct brw_ff_gs_prog_data *prog_data;
bool prog_active;
/** Offset in the program cache to the CLIP program pre-gen6 */
uint32_t state_offset;
uint32_t bind_bo_offset;
- uint32_t surf_offset[BRW_MAX_GS_SURFACES];
- } gs;
+ uint32_t surf_offset[BRW_MAX_GEN6_GS_SURFACES];
+ } ff_gs;
struct {
struct brw_clip_prog_data *prog_data;
struct {
struct brw_wm_prog_data *prog_data;
- /** offsets in the batch to sampler default colors (texture border color)
- */
- uint32_t sdc_offset[BRW_MAX_TEX_UNIT];
-
GLuint render_surf;
drm_intel_bo *scratch_bo;
uint32_t bind_bo_offset;
uint32_t surf_offset[BRW_MAX_WM_SURFACES];
+ /** SAMPLER_STATE count and table offset */
+ uint32_t sampler_count;
+ uint32_t sampler_offset;
+
+ /** Offsets in the batch to sampler default colors (texture border color)
+ */
+ uint32_t sdc_offset[BRW_MAX_TEX_UNIT];
+
struct {
struct ra_regs *regs;
uint32_t render_target_format[MESA_FORMAT_COUNT];
bool format_supported_as_render_target[MESA_FORMAT_COUNT];
+ /* Interpolation modes, one byte per vue slot.
+ * Used Gen4/5 by the clip|sf|wm stages. Ignored on Gen6+.
+ */
+ struct interpolation_mode_map interpolation_mode;
+
/* PrimitiveRestart */
struct {
bool in_progress;
__DRIcontext *driContext;
struct intel_screen *intelScreen;
+ void (*saved_viewport)(struct gl_context *ctx,
+ GLint x, GLint y, GLsizei width, GLsizei height);
};
/*======================================================================
void brw_workaround_depthstencil_alignment(struct brw_context *brw,
GLbitfield clear_mask);
+/* brw_object_purgeable.c */
+void brw_init_object_purgeable_functions(struct dd_function_table *functions);
+
/*======================================================================
* brw_queryobj.c
*/
*/
void brw_fs_alloc_reg_sets(struct brw_context *brw);
+/* brw_vec4_reg_allocate.cpp */
+void brw_vec4_alloc_reg_set(struct brw_context *brw);
+
/* brw_disasm.c */
int brw_disasm (FILE *file, struct brw_instruction *inst, int gen);
/* brw_vs.c */
gl_clip_plane *brw_select_clip_planes(struct gl_context *ctx);
+/* brw_draw_upload.c */
+unsigned brw_get_vertex_surface_type(struct brw_context *brw,
+ const struct gl_client_array *glarray);
+unsigned brw_get_index_type(GLenum type);
+
/* brw_wm_surface_state.c */
void brw_init_surface_formats(struct brw_context *brw);
void
/* gen7_urb.c */
void
-gen7_allocate_push_constants(struct brw_context *brw);
+gen7_emit_push_constant_state(struct brw_context *brw, unsigned vs_size,
+ unsigned gs_size, unsigned fs_size);
void
-gen7_emit_urb_state(struct brw_context *brw, GLuint nr_vs_entries,
- GLuint vs_size, GLuint vs_start);
+gen7_emit_urb_state(struct brw_context *brw,
+ unsigned nr_vs_entries, unsigned vs_size,
+ unsigned vs_start, unsigned nr_gs_entries,
+ unsigned gs_size, unsigned gs_start);
brw_program_reloc(struct brw_context *brw, uint32_t state_offset,
uint32_t prog_offset)
{
- struct intel_context *intel = &brw->intel;
-
- if (intel->gen >= 5) {
+ if (brw->gen >= 5) {
/* Using state base address. */
return prog_offset;
}
uint32_t width, uint32_t height,
uint32_t tile_x, uint32_t tile_y);
+extern const GLuint prim_to_hw_prim[GL_POLYGON+1];
+
+void
+brw_setup_vec4_key_clip_info(struct brw_context *brw,
+ struct brw_vec4_prog_key *key,
+ bool program_uses_clip_distance);
+
+void
+gen6_upload_vec4_push_constants(struct brw_context *brw,
+ const struct gl_program *prog,
+ const struct brw_vec4_prog_data *prog_data,
+ struct brw_stage_state *stage_state,
+ enum state_struct_type type);
+
#ifdef __cplusplus
}
#endif