#include "main/macros.h"
#include "main/mtypes.h"
#include "brw_structs.h"
-#include "brw_compiler.h"
+#include "compiler/brw_compiler.h"
#include "intel_aub.h"
#include "isl/isl.h"
uint32_t *map_next;
int reloc_count;
} saved;
+
+ /** Map from batch offset to brw_state_batch data (with DEBUG_BATCH) */
+ struct hash_table *state_batch_sizes;
};
#define BRW_MAX_XFB_STREAMS 4
struct gen_l3_config;
enum brw_query_kind {
+ OA_COUNTERS,
PIPELINE_STATS
};
{
enum brw_query_kind kind;
const char *name;
+ const char *guid;
struct brw_perf_query_counter *counters;
int n_counters;
size_t data_size;
+
+ /* OA specific */
+ uint64_t oa_metrics_set_id;
+ int oa_format;
+
+ /* For indexing into the accumulator[] ... */
+ int gpu_time_offset;
+ int gpu_clock_offset;
+ int a_offset;
+ int b_offset;
+ int c_offset;
};
/**
struct brw_stage_state base;
} cs;
- /* RS hardware binding table */
- struct {
- drm_intel_bo *bo;
- uint32_t next_offset;
- } hw_bt_pool;
-
struct {
uint32_t state_offset;
uint32_t blend_state_offset;
} predicate;
struct {
+ /* Variables referenced in the XML meta data for OA performance
+ * counters, e.g in the normalization equations.
+ *
+ * All uint64_t for consistent operand types in generated code
+ */
+ struct {
+ uint64_t timestamp_frequency; /** $GpuTimestampFrequency */
+ uint64_t n_eus; /** $EuCoresTotalCount */
+ uint64_t n_eu_slices; /** $EuSlicesTotalCount */
+ uint64_t subslice_mask; /** $SubsliceMask */
+ uint64_t gt_min_freq; /** $GpuMinFrequency */
+ uint64_t gt_max_freq; /** $GpuMaxFrequency */
+ } sys_vars;
+
+ /* OA metric sets, indexed by GUID, as know by Mesa at build time,
+ * to cross-reference with the GUIDs of configs advertised by the
+ * kernel at runtime
+ */
+ struct hash_table *oa_metrics_table;
+
struct brw_perf_query_info *queries;
int n_queries;
+ /* The i915 perf stream we open to setup + enable the OA counters */
+ int oa_stream_fd;
+
+ /* An i915 perf stream fd gives exclusive access to the OA unit that will
+ * report counter snapshots for a specific counter set/profile in a
+ * specific layout/format so we can only start OA queries that are
+ * compatible with the currently open fd...
+ */
+ int current_oa_metrics_set_id;
+ int current_oa_format;
+
+ /* List of buffers containing OA reports */
+ struct exec_list sample_buffers;
+
+ /* Cached list of empty sample buffers */
+ struct exec_list free_sample_buffers;
+
+ int n_active_oa_queries;
int n_active_pipeline_stats_queries;
+
+ /* The number of queries depending on running OA counters which
+ * extends beyond brw_end_perf_query() since we need to wait until
+ * the last MI_RPC command has parsed by the GPU.
+ *
+ * Accurate accounting is important here as emitting an
+ * MI_REPORT_PERF_COUNT command while the OA unit is disabled will
+ * effectively hang the gpu.
+ */
+ int n_oa_users;
+
+ /* To help catch an spurious problem with the hardware or perf
+ * forwarding samples, we emit each MI_REPORT_PERF_COUNT command
+ * with a unique ID that we can explicitly check for...
+ */
+ int next_query_start_report_id;
+
+ /**
+ * An array of queries whose results haven't yet been assembled
+ * based on the data in buffer objects.
+ *
+ * These may be active, or have already ended. However, the
+ * results have not been requested.
+ */
+ struct brw_perf_query_object **unaccumulated;
+ int unaccumulated_elements;
+ int unaccumulated_array_size;
+
+ /* The total number of query objects so we can relinquish
+ * our exclusive access to perf if the application deletes
+ * all of its objects. (NB: We only disable perf while
+ * there are no active queries)
+ */
+ int n_query_instances;
} perfquery;
int num_atoms[BRW_NUM_PIPELINES];
const struct brw_tracked_state render_atoms[76];
const struct brw_tracked_state compute_atoms[11];
- /* If (INTEL_DEBUG & DEBUG_BATCH) */
- struct {
- uint32_t offset;
- uint32_t size;
- enum aub_state_struct_type type;
- int index;
- } *state_batch_list;
- int state_batch_count;
-
uint32_t render_target_format[MESA_FORMAT_COUNT];
bool format_supported_as_render_target[MESA_FORMAT_COUNT];
void brw_emit_query_end(struct brw_context *brw);
void brw_query_counter(struct gl_context *ctx, struct gl_query_object *q);
bool brw_is_query_pipelined(struct brw_query_object *query);
+uint64_t brw_timebase_scale(struct brw_context *brw, uint64_t gpu_timestamp);
+uint64_t brw_raw_timestamp_delta(struct brw_context *brw,
+ uint64_t time0, uint64_t time1);
/** gen6_queryobj.c */
void gen6_init_queryobj_functions(struct dd_function_table *functions);
void brw_store_data_imm64(struct brw_context *brw, drm_intel_bo *bo,
uint32_t offset, uint64_t imm);
-/*======================================================================
- * brw_state_dump.c
- */
-void brw_debug_batch(struct brw_context *brw);
-void brw_annotate_aub(struct brw_context *brw);
-
/*======================================================================
* intel_tex_validate.c
*/
projects / mesa.git / blobdiff