BRW_STATE_URB_FENCE,
BRW_STATE_FRAGMENT_PROGRAM,
BRW_STATE_VERTEX_PROGRAM,
- BRW_STATE_INPUT_DIMENSIONS,
BRW_STATE_CURBE_OFFSETS,
BRW_STATE_REDUCED_PRIMITIVE,
BRW_STATE_PRIMITIVE,
BRW_STATE_INDICES,
BRW_STATE_VERTICES,
BRW_STATE_BATCH,
- BRW_STATE_NR_WM_SURFACES,
- BRW_STATE_NR_VS_SURFACES,
BRW_STATE_INDEX_BUFFER,
BRW_STATE_VS_CONSTBUF,
BRW_STATE_PROGRAM_CACHE,
BRW_STATE_STATE_BASE_ADDRESS,
- BRW_STATE_SOL_INDICES,
BRW_STATE_VUE_MAP_GEOM_OUT,
+ BRW_STATE_TRANSFORM_FEEDBACK,
+ BRW_STATE_RASTERIZER_DISCARD,
+ BRW_STATE_STATS_WM,
+ BRW_STATE_UNIFORM_BUFFER,
+ BRW_STATE_META_IN_PROGRESS,
};
#define BRW_NEW_URB_FENCE (1 << BRW_STATE_URB_FENCE)
#define BRW_NEW_FRAGMENT_PROGRAM (1 << BRW_STATE_FRAGMENT_PROGRAM)
#define BRW_NEW_VERTEX_PROGRAM (1 << BRW_STATE_VERTEX_PROGRAM)
-#define BRW_NEW_INPUT_DIMENSIONS (1 << BRW_STATE_INPUT_DIMENSIONS)
#define BRW_NEW_CURBE_OFFSETS (1 << BRW_STATE_CURBE_OFFSETS)
#define BRW_NEW_REDUCED_PRIMITIVE (1 << BRW_STATE_REDUCED_PRIMITIVE)
#define BRW_NEW_PRIMITIVE (1 << BRW_STATE_PRIMITIVE)
#define BRW_NEW_VS_CONSTBUF (1 << BRW_STATE_VS_CONSTBUF)
#define BRW_NEW_PROGRAM_CACHE (1 << BRW_STATE_PROGRAM_CACHE)
#define BRW_NEW_STATE_BASE_ADDRESS (1 << BRW_STATE_STATE_BASE_ADDRESS)
-#define BRW_NEW_SOL_INDICES (1 << BRW_STATE_SOL_INDICES)
#define BRW_NEW_VUE_MAP_GEOM_OUT (1 << BRW_STATE_VUE_MAP_GEOM_OUT)
+#define BRW_NEW_TRANSFORM_FEEDBACK (1 << BRW_STATE_TRANSFORM_FEEDBACK)
+#define BRW_NEW_RASTERIZER_DISCARD (1 << BRW_STATE_RASTERIZER_DISCARD)
+#define BRW_NEW_STATS_WM (1 << BRW_STATE_STATS_WM)
+#define BRW_NEW_UNIFORM_BUFFER (1 << BRW_STATE_UNIFORM_BUFFER)
+#define BRW_NEW_META_IN_PROGRESS (1 << BRW_STATE_META_IN_PROGRESS)
struct brw_state_flags {
/** State update flags signalled by mesa internals */
typedef enum
{
BRW_VARYING_SLOT_NDC = VARYING_SLOT_MAX,
- BRW_VARYING_SLOT_POS_DUPLICATE,
BRW_VARYING_SLOT_PAD,
/**
* Technically this is not a varying but just a placeholder that
return brw_vue_slot_to_offset(vue_map->varying_to_slot[varying]);
}
+void brw_compute_vue_map(struct brw_context *brw, struct brw_vue_map *vue_map,
+ GLbitfield64 slots_valid, bool userclip_active);
+
struct brw_sf_prog_data {
GLuint urb_read_length;
unsigned svbi_postincrement_value;
};
-/* Note: brw_vs_prog_data_compare() must be updated when adding fields to this
- * struct!
+
+/* Note: brw_vec4_prog_data_compare() must be updated when adding fields to
+ * this struct!
*/
-struct brw_vs_prog_data {
+struct brw_vec4_prog_data {
struct brw_vue_map vue_map;
GLuint curb_read_length;
GLuint nr_pull_params; /**< number of dwords referenced by pull_param[] */
GLuint total_scratch;
- GLbitfield64 inputs_read;
-
- /* Used for calculating urb partitions:
+ /* Used for calculating urb partitions. In the VS, this is the size of the
+ * URB entry used for both input and output to the thread. In the GS, this
+ * is the size of the URB entry used for output.
*/
GLuint urb_entry_size;
- bool uses_vertexid;
-
int num_surfaces;
- /* These pointers must appear last. See brw_vs_prog_data_compare(). */
+ /* These pointers must appear last. See brw_vec4_prog_data_compare(). */
const float **param;
const float **pull_param;
};
+
+/* Note: brw_vs_prog_data_compare() must be updated when adding fields to this
+ * struct!
+ */
+struct brw_vs_prog_data {
+ struct brw_vec4_prog_data base;
+
+ GLbitfield64 inputs_read;
+
+ bool uses_vertexid;
+};
+
/** Number of texture sampler units */
#define BRW_MAX_TEX_UNIT 16
#define SHADER_TIME_STRIDE 64
enum brw_cache_id {
- BRW_BLEND_STATE,
- BRW_DEPTH_STENCIL_STATE,
- BRW_COLOR_CALC_STATE,
BRW_CC_VP,
BRW_CC_UNIT,
BRW_WM_PROG,
BRW_BLORP_BLIT_PROG,
+ BRW_BLORP_CONST_COLOR_PROG,
BRW_SAMPLER,
BRW_WM_UNIT,
BRW_SF_PROG,
/* Flags for brw->state.cache.
*/
-#define CACHE_NEW_BLEND_STATE (1<<BRW_BLEND_STATE)
-#define CACHE_NEW_DEPTH_STENCIL_STATE (1<<BRW_DEPTH_STENCIL_STATE)
-#define CACHE_NEW_COLOR_CALC_STATE (1<<BRW_COLOR_CALC_STATE)
#define CACHE_NEW_CC_VP (1<<BRW_CC_VP)
#define CACHE_NEW_CC_UNIT (1<<BRW_CC_UNIT)
#define CACHE_NEW_WM_PROG (1<<BRW_WM_PROG)
unsigned int offset;
};
-
-
-struct brw_vertex_info {
- GLuint sizes[ATTRIB_BIT_DWORDS * 2]; /* sizes:2[VERT_ATTRIB_MAX] */
-};
-
struct brw_query_object {
struct gl_query_object Base;
struct brw_context
{
struct intel_context intel; /**< base class, must be first field */
+
+ struct
+ {
+ void (*destroy) (struct brw_context * brw);
+ void (*finish_batch) (struct brw_context * brw);
+ void (*new_batch) (struct brw_context * brw);
+
+ void (*update_texture_surface)(struct gl_context *ctx,
+ unsigned unit,
+ uint32_t *binding_table,
+ unsigned surf_index);
+ void (*update_renderbuffer_surface)(struct brw_context *brw,
+ struct gl_renderbuffer *rb,
+ bool layered,
+ unsigned unit);
+ void (*update_null_renderbuffer_surface)(struct brw_context *brw,
+ unsigned unit);
+ void (*create_constant_surface)(struct brw_context *brw,
+ drm_intel_bo *bo,
+ uint32_t offset,
+ uint32_t size,
+ uint32_t *out_offset,
+ bool dword_pitch);
+
+ /**
+ * Send the appropriate state packets to configure depth, stencil, and
+ * HiZ buffers (i965+ only)
+ */
+ void (*emit_depth_stencil_hiz)(struct brw_context *brw,
+ struct intel_mipmap_tree *depth_mt,
+ uint32_t depth_offset,
+ uint32_t depthbuffer_format,
+ uint32_t depth_surface_type,
+ struct intel_mipmap_tree *stencil_mt,
+ bool hiz, bool separate_stencil,
+ uint32_t width, uint32_t height,
+ uint32_t tile_x, uint32_t tile_y);
+
+ } vtbl;
+
+ dri_bufmgr *bufmgr;
+
+ drm_intel_context *hw_ctx;
+
+ struct intel_batchbuffer batch;
+
+ /**
+ * Set if rendering has occured to the drawable's front buffer.
+ *
+ * This is used in the DRI2 case to detect that glFlush should also copy
+ * the contents of the fake front buffer to the real front buffer.
+ */
+ bool front_buffer_dirty;
+
+ /**
+ * Track whether front-buffer rendering is currently enabled
+ *
+ * A separate flag is used to track this in order to support MRT more
+ * easily.
+ */
+ bool is_front_buffer_rendering;
+
+ /**
+ * Track whether front-buffer is the current read target.
+ *
+ * This is closely associated with is_front_buffer_rendering, but may
+ * be set separately. The DRI2 fake front buffer must be referenced
+ * either way.
+ */
+ bool is_front_buffer_reading;
+
+ /** Framerate throttling: @{ */
+ drm_intel_bo *first_post_swapbuffers_batch;
+ bool need_throttle;
+ /** @} */
+
+ GLuint stats_wm;
+
+ /**
+ * drirc options:
+ * @{
+ */
+ bool no_rast;
+ bool always_flush_batch;
+ bool always_flush_cache;
+ bool disable_throttling;
+ bool precompile;
+
+ driOptionCache optionCache;
+ /** @} */
+
GLuint primitive; /**< Hardware primitive, such as _3DPRIM_TRILIST. */
+ GLenum reduced_primitive;
+
bool emit_state_always;
bool has_surface_tile_offset;
bool has_compr4;
bool has_negative_rhw_bug;
bool has_aa_line_parameters;
bool has_pln;
- bool precompile;
/**
* Some versions of Gen hardware don't do centroid interpolation correctly
struct brw_cache cache;
struct brw_cached_batch_item *cached_batch_items;
+ /* Whether a meta-operation is in progress. */
+ bool meta_in_progress;
+
struct {
struct brw_vertex_element inputs[VERT_ATTRIB_MAX];
struct brw_vertex_buffer buffers[VERT_ATTRIB_MAX];
/* Summary of size and varying of active arrays, so we can check
* for changes to this state:
*/
- struct brw_vertex_info info;
unsigned int min_index, max_index;
/* Offset from start of vertex buffer so we can avoid redefining
GLuint nr_sf_entries;
GLuint nr_cs_entries;
- /* gen6:
- * The length of each URB entry owned by the VS (or GS), as
- * a number of 1024-bit (128-byte) rows. Should be >= 1.
- *
- * gen7: Same meaning, but in 512-bit (64-byte) rows.
- */
- GLuint vs_size;
- GLuint gs_size;
-
GLuint vs_start;
GLuint gs_start;
GLuint clip_start;
} *state_batch_list;
int state_batch_count;
- struct brw_sol_state {
- uint32_t svbi_0_starting_index;
- uint32_t svbi_0_max_index;
- uint32_t offset_0_batch_start;
- uint32_t primitives_generated;
- uint32_t primitives_written;
- bool counting_primitives_generated;
- bool counting_primitives_written;
- } sol;
-
uint32_t render_target_format[MESA_FORMAT_COUNT];
bool format_supported_as_render_target[MESA_FORMAT_COUNT];
struct {
struct intel_mipmap_tree *depth_mt;
struct intel_mipmap_tree *stencil_mt;
- struct intel_mipmap_tree *hiz_mt;
/* Inter-tile (page-aligned) byte offsets. */
uint32_t depth_offset, hiz_offset, stencil_offset;
* brw_misc_state.c
*/
void brw_get_depthstencil_tile_masks(struct intel_mipmap_tree *depth_mt,
+ uint32_t depth_level,
+ uint32_t depth_layer,
struct intel_mipmap_tree *stencil_mt,
uint32_t *out_tile_mask_x,
uint32_t *out_tile_mask_y);
/*======================================================================
* brw_queryobj.c
*/
-void brw_init_queryobj_functions(struct dd_function_table *functions);
+void brw_init_common_queryobj_functions(struct dd_function_table *functions);
+void gen4_init_queryobj_functions(struct dd_function_table *functions);
void brw_emit_query_begin(struct brw_context *brw);
void brw_emit_query_end(struct brw_context *brw);
+/** gen6_queryobj.c */
+void gen6_init_queryobj_functions(struct dd_function_table *functions);
+
/*======================================================================
* brw_state_dump.c
*/
-void brw_debug_batch(struct intel_context *intel);
-void brw_annotate_aub(struct intel_context *intel);
+void brw_debug_batch(struct brw_context *brw);
+void brw_annotate_aub(struct brw_context *brw);
/*======================================================================
* brw_tex.c
void brwInitFragProgFuncs( struct dd_function_table *functions );
int brw_get_scratch_size(int size);
-void brw_get_scratch_bo(struct intel_context *intel,
+void brw_get_scratch_bo(struct brw_context *brw,
drm_intel_bo **scratch_bo, int size);
void brw_init_shader_time(struct brw_context *brw);
int brw_get_shader_time_index(struct brw_context *brw,
struct gl_shader *shader,
uint32_t *surf_offsets);
+/* brw_surface_formats.c */
+bool brw_is_hiz_depth_format(struct brw_context *ctx, gl_format format);
+bool brw_render_target_supported(struct brw_context *brw,
+ struct gl_renderbuffer *rb);
+
/* gen6_sol.c */
void
brw_begin_transform_feedback(struct gl_context *ctx, GLenum mode,
/* gen7_sol_state.c */
void
+gen7_begin_transform_feedback(struct gl_context *ctx, GLenum mode,
+ struct gl_transform_feedback_object *obj);
+void
gen7_end_transform_feedback(struct gl_context *ctx,
struct gl_transform_feedback_object *obj);
/* brw_blorp_blit.cpp */
GLbitfield
-brw_blorp_framebuffer(struct intel_context *intel,
+brw_blorp_framebuffer(struct brw_context *brw,
GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
GLbitfield mask, GLenum filter);
bool
-brw_blorp_copytexsubimage(struct intel_context *intel,
+brw_blorp_copytexsubimage(struct brw_context *brw,
struct gl_renderbuffer *src_rb,
struct gl_texture_image *dst_image,
+ int slice,
int srcX0, int srcY0,
int dstX0, int dstY0,
int width, int height);
return prog_offset;
}
- drm_intel_bo_emit_reloc(intel->batch.bo,
+ drm_intel_bo_emit_reloc(brw->batch.bo,
state_offset,
brw->cache.bo,
prog_offset,
}
bool brw_do_cubemap_normalize(struct exec_list *instructions);
-bool brw_lower_texture_gradients(struct exec_list *instructions);
+bool brw_lower_texture_gradients(struct brw_context *brw,
+ struct exec_list *instructions);
struct opcode_desc {
char *name;
uint32_t depth_offset, uint32_t depthbuffer_format,
uint32_t depth_surface_type,
struct intel_mipmap_tree *stencil_mt,
- struct intel_mipmap_tree *hiz_mt,
- bool separate_stencil, uint32_t width,
- uint32_t height, uint32_t tile_x, uint32_t tile_y);
+ bool hiz, bool separate_stencil,
+ uint32_t width, uint32_t height,
+ uint32_t tile_x, uint32_t tile_y);
void
gen7_emit_depth_stencil_hiz(struct brw_context *brw,
uint32_t depth_offset, uint32_t depthbuffer_format,
uint32_t depth_surface_type,
struct intel_mipmap_tree *stencil_mt,
- struct intel_mipmap_tree *hiz_mt,
- bool separate_stencil, uint32_t width,
- uint32_t height, uint32_t tile_x, uint32_t tile_y);
+ bool hiz, bool separate_stencil,
+ uint32_t width, uint32_t height,
+ uint32_t tile_x, uint32_t tile_y);
#ifdef __cplusplus
}
projects / mesa.git / blobdiff