i965: Push down inclusion of brw_program.h.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_cs.c
index 18579629b3d5400432deba17a17e2ce1224e0594..a34c32047ff351e3efa1cdfd1658bb4b6daaecc0 100644 (file)
@@ -30,7 +30,8 @@
 #include "intel_mipmap_tree.h"
 #include "brw_state.h"
 #include "intel_batchbuffer.h"
-#include "glsl/nir/nir.h"
+#include "brw_nir.h"
+#include "brw_program.h"
 
 static void
 assign_cs_binding_table_offsets(const struct brw_device_info *devinfo,
@@ -89,15 +90,31 @@ brw_codegen_cs_prog(struct brw_context *brw,
    prog_data.base.nr_params = param_count;
    prog_data.base.nr_image_params = cs->base.NumImages;
 
+   brw_nir_setup_glsl_uniforms(cp->program.Base.nir, prog, &cp->program.Base,
+                               &prog_data.base, true);
+
    if (unlikely(brw->perf_debug)) {
       start_busy = (brw->batch.last_bo &&
                     drm_intel_bo_busy(brw->batch.last_bo));
       start_time = get_time();
    }
 
-   program = brw_cs_emit(brw, mem_ctx, key, &prog_data,
-                         &cp->program, prog, &program_size);
+   if (unlikely(INTEL_DEBUG & DEBUG_CS))
+      brw_dump_ir("compute", prog, &cs->base, &cp->program.Base);
+
+   int st_index = -1;
+   if (INTEL_DEBUG & DEBUG_SHADER_TIME)
+      st_index = brw_get_shader_time_index(brw, prog, &cp->program.Base, ST_CS);
+
+   char *error_str;
+   program = brw_compile_cs(brw->intelScreen->compiler, brw, mem_ctx,
+                            key, &prog_data, cp->program.Base.nir,
+                            st_index, &program_size, &error_str);
    if (program == NULL) {
+      prog->LinkStatus = false;
+      ralloc_strcat(&prog->InfoLog, error_str);
+      _mesa_problem(NULL, "Failed to compile compute shader: %s\n", error_str);
+
       ralloc_free(mem_ctx);
       return false;
    }