* quickly at thread setup time. Each individual fixed function unit's state
* (brw_vs_state.c for example) tells the hardware which subset of the CURBE
* it wants in its register space, and we calculate those areas here under the
- * BRW_NEW_CURBE_OFFSETS state flag. The brw_urb.c allocation will control
+ * BRW_NEW_PUSH_CONSTANT_ALLOCATION state flag. The brw_urb.c allocation will control
* how many CURBEs can be loaded into the hardware at once before a pipeline
* stall occurs at CMD_CONST_BUFFER time.
*
*/
-#include "main/glheader.h"
+#include "compiler/nir/nir.h"
#include "main/context.h"
#include "main/macros.h"
#include "main/enums.h"
#include "program/prog_parameter.h"
#include "program/prog_print.h"
#include "program/prog_statevars.h"
+#include "util/bitscan.h"
#include "intel_batchbuffer.h"
#include "intel_buffer_objects.h"
#include "brw_context.h"
#include "brw_defines.h"
#include "brw_state.h"
#include "brw_util.h"
+#include "util/u_math.h"
/**
{
struct gl_context *ctx = &brw->ctx;
/* BRW_NEW_FS_PROG_DATA */
- const GLuint nr_fp_regs = (brw->wm.prog_data->base.nr_params + 15) / 16;
+ const GLuint nr_fp_regs = (brw->wm.base.prog_data->nr_params + 15) / 16;
/* BRW_NEW_VS_PROG_DATA */
- const GLuint nr_vp_regs = (brw->vs.prog_data->base.base.nr_params + 15) / 16;
+ const GLuint nr_vp_regs = (brw->vs.base.prog_data->nr_params + 15) / 16;
GLuint nr_clip_regs = 0;
GLuint total_regs;
/* _NEW_TRANSFORM */
if (ctx->Transform.ClipPlanesEnabled) {
- GLuint nr_planes = 6 + _mesa_bitcount_64(ctx->Transform.ClipPlanesEnabled);
+ GLuint nr_planes = 6 + util_bitcount(ctx->Transform.ClipPlanesEnabled);
nr_clip_regs = (nr_planes * 4 + 15) / 16;
}
brw->curbe.vs_start,
brw->curbe.vs_size );
- brw->ctx.NewDriverState |= BRW_NEW_CURBE_OFFSETS;
+ brw->ctx.NewDriverState |= BRW_NEW_PUSH_CONSTANT_ALLOCATION;
}
}
.dirty = {
.mesa = _NEW_TRANSFORM,
.brw = BRW_NEW_CONTEXT |
+ BRW_NEW_BLORP |
BRW_NEW_FS_PROG_DATA |
BRW_NEW_VS_PROG_DATA,
},
ADVANCE_BATCH();
}
-static GLfloat fixed_plane[6][4] = {
+static const GLfloat fixed_plane[6][4] = {
{ 0, 0, -1, 1 },
{ 0, 0, 1, 1 },
{ 0, -1, 0, 1 },
static void
brw_upload_constant_buffer(struct brw_context *brw)
{
+ const struct gen_device_info *devinfo = &brw->screen->devinfo;
struct gl_context *ctx = &brw->ctx;
- /* BRW_NEW_CURBE_OFFSETS */
+ /* BRW_NEW_PUSH_CONSTANT_ALLOCATION */
const GLuint sz = brw->curbe.total_size;
const GLuint bufsz = sz * 16 * sizeof(GLfloat);
gl_constant_value *buf;
GLuint i;
gl_clip_plane *clip_planes;
+ /* BRW_NEW_FRAGMENT_PROGRAM */
+ struct gl_program *fp = brw->programs[MESA_SHADER_FRAGMENT];
+
+ /* BRW_NEW_VERTEX_PROGRAM */
+ struct gl_program *vp = brw->programs[MESA_SHADER_VERTEX];
+
if (sz == 0) {
goto emit;
}
- buf = intel_upload_space(brw, bufsz, 64,
- &brw->curbe.curbe_bo, &brw->curbe.curbe_offset);
+ buf = brw_upload_space(&brw->upload, bufsz, 64,
+ &brw->curbe.curbe_bo, &brw->curbe.curbe_offset);
STATIC_ASSERT(sizeof(gl_constant_value) == sizeof(float));
/* fragment shader constants */
if (brw->curbe.wm_size) {
- _mesa_load_state_parameters(ctx, brw->fragment_program->Base.Parameters);
+ _mesa_load_state_parameters(ctx, fp->Parameters);
- /* BRW_NEW_CURBE_OFFSETS */
+ /* BRW_NEW_PUSH_CONSTANT_ALLOCATION */
GLuint offset = brw->curbe.wm_start * 16;
/* BRW_NEW_FS_PROG_DATA | _NEW_PROGRAM_CONSTANTS: copy uniform values */
- for (i = 0; i < brw->wm.prog_data->base.nr_params; i++) {
- buf[offset + i] = *brw->wm.prog_data->base.param[i];
- }
+ brw_populate_constant_data(brw, fp, &brw->wm.base, &buf[offset],
+ brw->wm.base.prog_data->param,
+ brw->wm.base.prog_data->nr_params);
}
/* clipper constants */
if (brw->curbe.clip_size) {
GLuint offset = brw->curbe.clip_start * 16;
- GLuint j;
+ GLbitfield mask;
/* If any planes are going this way, send them all this way:
*/
* clip-space:
*/
clip_planes = brw_select_clip_planes(ctx);
- for (j = 0; j < MAX_CLIP_PLANES; j++) {
- if (ctx->Transform.ClipPlanesEnabled & (1<<j)) {
- buf[offset + i * 4 + 0].f = clip_planes[j][0];
- buf[offset + i * 4 + 1].f = clip_planes[j][1];
- buf[offset + i * 4 + 2].f = clip_planes[j][2];
- buf[offset + i * 4 + 3].f = clip_planes[j][3];
- i++;
- }
+ mask = ctx->Transform.ClipPlanesEnabled;
+ while (mask) {
+ const int j = u_bit_scan(&mask);
+ buf[offset + i * 4 + 0].f = clip_planes[j][0];
+ buf[offset + i * 4 + 1].f = clip_planes[j][1];
+ buf[offset + i * 4 + 2].f = clip_planes[j][2];
+ buf[offset + i * 4 + 3].f = clip_planes[j][3];
+ i++;
}
}
/* vertex shader constants */
if (brw->curbe.vs_size) {
- _mesa_load_state_parameters(ctx, brw->vertex_program->Base.Parameters);
+ _mesa_load_state_parameters(ctx, vp->Parameters);
GLuint offset = brw->curbe.vs_start * 16;
/* BRW_NEW_VS_PROG_DATA | _NEW_PROGRAM_CONSTANTS: copy uniform values */
- for (i = 0; i < brw->vs.prog_data->base.base.nr_params; i++) {
- buf[offset + i] = *brw->vs.prog_data->base.base.param[i];
- }
+ brw_populate_constant_data(brw, vp, &brw->vs.base, &buf[offset],
+ brw->vs.base.prog_data->param,
+ brw->vs.base.prog_data->nr_params);
}
if (0) {
OUT_BATCH(0);
} else {
OUT_BATCH((CMD_CONST_BUFFER << 16) | (1 << 8) | (2 - 2));
- OUT_RELOC(brw->curbe.curbe_bo,
- I915_GEM_DOMAIN_INSTRUCTION, 0,
+ OUT_RELOC(brw->curbe.curbe_bo, 0,
(brw->curbe.total_size - 1) + brw->curbe.curbe_offset);
}
ADVANCE_BATCH();
*
* BRW_NEW_FRAGMENT_PROGRAM
*/
- if (brw->gen == 4 && !brw->is_g4x &&
- (brw->fragment_program->Base.InputsRead & (1 << VARYING_SLOT_POS))) {
+ if (devinfo->gen == 4 && !devinfo->is_g4x &&
+ (fp->info.system_values_read & (1ull << SYSTEM_VALUE_FRAG_COORD))) {
BEGIN_BATCH(2);
OUT_BATCH(_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP << 16 | (2 - 2));
OUT_BATCH(0);
.dirty = {
.mesa = _NEW_PROGRAM_CONSTANTS,
.brw = BRW_NEW_BATCH |
- BRW_NEW_CURBE_OFFSETS |
+ BRW_NEW_BLORP |
+ BRW_NEW_PUSH_CONSTANT_ALLOCATION |
BRW_NEW_FRAGMENT_PROGRAM |
BRW_NEW_FS_PROG_DATA |
BRW_NEW_PSP | /* Implicit - hardware requires this, not used above */
},
.emit = brw_upload_constant_buffer,
};
-