i965: Remove never used RSR and RSL opcodes.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_defines.h

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 2e1285fec0adb60b3143891f1777e4dccb4c6f3f..7040a270d41a314012831ada6b70a5555350e371 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -691,8 +691,6 @@ enum opcode {
    BRW_OPCODE_XOR =    7,
    BRW_OPCODE_SHR =    8,
    BRW_OPCODE_SHL =    9,
-   BRW_OPCODE_RSR =    10,
-   BRW_OPCODE_RSL =    11,
    BRW_OPCODE_ASR =    12,
    BRW_OPCODE_CMP =    16,
    BRW_OPCODE_CMPN =   17,
@@ -843,6 +841,13 @@ enum opcode {
     * - src0.x is the vertex count.  The upper 16 bits will be ignored.
     */
    GS_OPCODE_SET_VERTEX_COUNT,
+
+   /**
+    * Set DWORD 2 of dst to the immediate value in src.  Used by geometry
+    * shaders to initialize DWORD 2 of R0, which needs to be 0 in order for
+    * scratch reads and writes to operate correctly.
+    */
+   GS_OPCODE_SET_DWORD_2_IMMED,
 };
 
 #define BRW_PREDICATE_NONE             0
@@ -1276,7 +1281,13 @@ enum brw_message_target {
 # define GEN7_URB_ENTRY_SIZE_SHIFT                      16
 # define GEN7_URB_STARTING_ADDRESS_SHIFT                25
 
+/* "GS URB Entry Allocation Size" is a U9-1 field, so the maximum gs_size
+ * is 2^9, or 512.  It's counted in multiples of 64 bytes.
+ */
+#define GEN7_MAX_GS_URB_ENTRY_SIZE_BYTES               (512*64)
+
 #define _3DSTATE_PUSH_CONSTANT_ALLOC_VS         0x7912 /* GEN7+ */
+#define _3DSTATE_PUSH_CONSTANT_ALLOC_GS         0x7915 /* GEN7+ */
 #define _3DSTATE_PUSH_CONSTANT_ALLOC_PS         0x7916 /* GEN7+ */
 # define GEN7_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT         16
 
@@ -1340,6 +1351,11 @@ enum brw_message_target {
 # define BRW_GS_EDGE_INDICATOR_0                       (1 << 8)
 # define BRW_GS_EDGE_INDICATOR_1                       (1 << 9)
 
+/* 3DSTATE_GS "Output Vertex Size" has an effective maximum of 62.  It's
+ * counted in multiples of 16 bytes.
+ */
+#define GEN7_MAX_GS_OUTPUT_VERTEX_SIZE_BYTES           (62*16)
+
 #define _3DSTATE_HS                             0x781B /* GEN7+ */
 #define _3DSTATE_TE                             0x781C /* GEN7+ */
 #define _3DSTATE_DS                             0x781D /* GEN7+ */