Merge remote branch 'origin/7.8'
[mesa.git] / src / mesa / drivers / dri / i965 / brw_draw_upload.c
index c773b71507cb9909746fe2b891ebd13e411ad46c..8247faa36d8d082e891b91d57895ce3446433d58 100644 (file)
 #include "main/glheader.h"
 #include "main/bufferobj.h"
 #include "main/context.h"
-#include "main/state.h"
-#include "main/api_validate.h"
 #include "main/enums.h"
 
 #include "brw_draw.h"
 #include "brw_defines.h"
 #include "brw_context.h"
 #include "brw_state.h"
-#include "brw_fallback.h"
 
 #include "intel_batchbuffer.h"
 #include "intel_buffer_objects.h"
-#include "intel_tex.h"
 
 static GLuint double_types[5] = {
    0,
@@ -59,6 +55,14 @@ static GLuint float_types[5] = {
    BRW_SURFACEFORMAT_R32G32B32A32_FLOAT
 };
 
+static GLuint half_float_types[5] = {
+   0,
+   BRW_SURFACEFORMAT_R16_FLOAT,
+   BRW_SURFACEFORMAT_R16G16_FLOAT,
+   0, /* can't seem to render this one */
+   BRW_SURFACEFORMAT_R16G16B16A16_FLOAT
+};
+
 static GLuint uint_types_norm[5] = {
    0,
    BRW_SURFACEFORMAT_R32_UNORM,
@@ -165,13 +169,14 @@ static GLuint get_surface_type( GLenum type, GLuint size,
                                 GLenum format, GLboolean normalized )
 {
    if (INTEL_DEBUG & DEBUG_VERTS)
-      _mesa_printf("type %s size %d normalized %d\n", 
+      printf("type %s size %d normalized %d\n", 
                   _mesa_lookup_enum_by_nr(type), size, normalized);
 
    if (normalized) {
       switch (type) {
       case GL_DOUBLE: return double_types[size];
       case GL_FLOAT: return float_types[size];
+      case GL_HALF_FLOAT: return half_float_types[size];
       case GL_INT: return int_types_norm[size];
       case GL_SHORT: return short_types_norm[size];
       case GL_BYTE: return byte_types_norm[size];
@@ -194,6 +199,7 @@ static GLuint get_surface_type( GLenum type, GLuint size,
       switch (type) {
       case GL_DOUBLE: return double_types[size];
       case GL_FLOAT: return float_types[size];
+      case GL_HALF_FLOAT: return half_float_types[size];
       case GL_INT: return int_types_scale[size];
       case GL_SHORT: return short_types_scale[size];
       case GL_BYTE: return byte_types_scale[size];
@@ -211,6 +217,7 @@ static GLuint get_size( GLenum type )
    switch (type) {
    case GL_DOUBLE: return sizeof(GLdouble);
    case GL_FLOAT: return sizeof(GLfloat);
+   case GL_HALF_FLOAT: return sizeof(GLhalfARB);
    case GL_INT: return sizeof(GLint);
    case GL_SHORT: return sizeof(GLshort);
    case GL_BYTE: return sizeof(GLbyte);
@@ -269,7 +276,6 @@ copy_array_to_vbo_array( struct brw_context *brw,
                         struct brw_vertex_element *element,
                         GLuint dst_stride)
 {
-   struct intel_context *intel = &brw->intel;
    GLuint size = element->count * dst_stride;
 
    get_space(brw, size, &element->bo, &element->offset);
@@ -282,52 +288,26 @@ copy_array_to_vbo_array( struct brw_context *brw,
    }
 
    if (dst_stride == element->glarray->StrideB) {
-      if (intel->intelScreen->kernel_exec_fencing) {
-        drm_intel_gem_bo_map_gtt(element->bo);
-        memcpy((char *)element->bo->virtual + element->offset,
-               element->glarray->Ptr, size);
-        drm_intel_gem_bo_unmap_gtt(element->bo);
-      } else {
-        dri_bo_subdata(element->bo,
-                       element->offset,
-                       size,
-                       element->glarray->Ptr);
-      }
+      drm_intel_gem_bo_map_gtt(element->bo);
+      memcpy((char *)element->bo->virtual + element->offset,
+            element->glarray->Ptr, size);
+      drm_intel_gem_bo_unmap_gtt(element->bo);
    } else {
       char *dest;
       const unsigned char *src = element->glarray->Ptr;
       int i;
 
-      if (intel->intelScreen->kernel_exec_fencing) {
-        drm_intel_gem_bo_map_gtt(element->bo);
-        dest = element->bo->virtual;
-        dest += element->offset;
-
-        for (i = 0; i < element->count; i++) {
-           memcpy(dest, src, dst_stride);
-           src += element->glarray->StrideB;
-           dest += dst_stride;
-        }
-
-        drm_intel_gem_bo_unmap_gtt(element->bo);
-      } else {
-        void *data;
-
-        data = _mesa_malloc(dst_stride * element->count);
-        dest = data;
-        for (i = 0; i < element->count; i++) {
-           memcpy(dest, src, dst_stride);
-           src += element->glarray->StrideB;
-           dest += dst_stride;
-        }
-
-        dri_bo_subdata(element->bo,
-                       element->offset,
-                       size,
-                       data);
+      drm_intel_gem_bo_map_gtt(element->bo);
+      dest = element->bo->virtual;
+      dest += element->offset;
 
-        _mesa_free(data);
+      for (i = 0; i < element->count; i++) {
+        memcpy(dest, src, dst_stride);
+        src += element->glarray->StrideB;
+        dest += dst_stride;
       }
+
+      drm_intel_gem_bo_unmap_gtt(element->bo);
    }
 }
 
@@ -348,7 +328,7 @@ static void brw_prepare_vertices(struct brw_context *brw)
    /* First build an array of pointers to ve's in vb.inputs_read
     */
    if (0)
-      _mesa_printf("%s %d..%d\n", __FUNCTION__, min_index, max_index);
+      printf("%s %d..%d\n", __FUNCTION__, min_index, max_index);
 
    /* Accumulate the list of enabled arrays. */
    brw->vb.nr_enabled = 0;
@@ -496,10 +476,17 @@ static void brw_emit_vertices(struct brw_context *brw)
    if (brw->vb.nr_enabled == 0) {
       BEGIN_BATCH(3);
       OUT_BATCH((CMD_VERTEX_ELEMENT << 16) | 1);
-      OUT_BATCH((0 << BRW_VE0_INDEX_SHIFT) |
-               BRW_VE0_VALID |
-               (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) |
-               (0 << BRW_VE0_SRC_OFFSET_SHIFT));
+      if (IS_GEN6(intel->intelScreen->deviceID)) {
+        OUT_BATCH((0 << GEN6_VE0_INDEX_SHIFT) |
+                  GEN6_VE0_VALID |
+                  (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) |
+                  (0 << BRW_VE0_SRC_OFFSET_SHIFT));
+      } else {
+        OUT_BATCH((0 << BRW_VE0_INDEX_SHIFT) |
+                  BRW_VE0_VALID |
+                  (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) |
+                  (0 << BRW_VE0_SRC_OFFSET_SHIFT));
+      }
       OUT_BATCH((BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_0_SHIFT) |
                (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) |
                (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
@@ -520,14 +507,22 @@ static void brw_emit_vertices(struct brw_context *brw)
 
    for (i = 0; i < brw->vb.nr_enabled; i++) {
       struct brw_vertex_element *input = brw->vb.enabled[i];
+      uint32_t dw0;
 
-      OUT_BATCH((i << BRW_VB0_INDEX_SHIFT) |
-               BRW_VB0_ACCESS_VERTEXDATA |
+      if (intel->gen >= 6) {
+        dw0 = GEN6_VB0_ACCESS_VERTEXDATA |
+           (i << GEN6_VB0_INDEX_SHIFT);
+      } else {
+        dw0 = BRW_VB0_ACCESS_VERTEXDATA |
+           (i << BRW_VB0_INDEX_SHIFT);
+      }
+
+      OUT_BATCH(dw0 |
                (input->stride << BRW_VB0_PITCH_SHIFT));
       OUT_RELOC(input->bo,
                I915_GEM_DOMAIN_VERTEX, 0,
                input->offset);
-      if (intel->is_ironlake) {
+      if (intel->gen >= 5) {
         OUT_RELOC(input->bo,
                   I915_GEM_DOMAIN_VERTEX, 0,
                   input->bo->size - 1);
@@ -558,12 +553,19 @@ static void brw_emit_vertices(struct brw_context *brw)
         break;
       }
 
-      OUT_BATCH((i << BRW_VE0_INDEX_SHIFT) |
-               BRW_VE0_VALID |
-               (format << BRW_VE0_FORMAT_SHIFT) |
-               (0 << BRW_VE0_SRC_OFFSET_SHIFT));
+      if (IS_GEN6(intel->intelScreen->deviceID)) {
+        OUT_BATCH((i << GEN6_VE0_INDEX_SHIFT) |
+                  GEN6_VE0_VALID |
+                  (format << BRW_VE0_FORMAT_SHIFT) |
+                  (0 << BRW_VE0_SRC_OFFSET_SHIFT));
+      } else {
+        OUT_BATCH((i << BRW_VE0_INDEX_SHIFT) |
+                  BRW_VE0_VALID |
+                  (format << BRW_VE0_FORMAT_SHIFT) |
+                  (0 << BRW_VE0_SRC_OFFSET_SHIFT));
+      }
 
-      if (intel->is_ironlake)
+      if (intel->gen >= 5)
           OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
                     (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
                     (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
@@ -617,13 +619,9 @@ static void brw_prepare_indices(struct brw_context *brw)
 
       /* Straight upload
        */
-      if (intel->intelScreen->kernel_exec_fencing) {
-        drm_intel_gem_bo_map_gtt(bo);
-        memcpy((char *)bo->virtual + offset, index_buffer->ptr, ib_size);
-        drm_intel_gem_bo_unmap_gtt(bo);
-      } else {
-        dri_bo_subdata(bo, offset, ib_size, index_buffer->ptr);
-      }
+      drm_intel_gem_bo_map_gtt(bo);
+      memcpy((char *)bo->virtual + offset, index_buffer->ptr, ib_size);
+      drm_intel_gem_bo_unmap_gtt(bo);
    } else {
       offset = (GLuint) (unsigned long) index_buffer->ptr;
       brw->ib.start_vertex_offset = 0;