i965: Fix VB packet reuse when offset for the new buffer isn't stride aligned.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_draw_upload.c

diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c
index 17af046b50376808dfec25e5811ee6d7c5654af7..b15c05a7ad192c2c2ec9244a38ae076b1a518f7c 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
@@ -470,7 +470,7 @@ static void brw_prepare_vertices(struct brw_context *brw)
         d = brw->vb.buffers[i].offset - brw->vb.current_buffers[i].offset;
         if (delta == 0)
            delta = d / brw->vb.current_buffers[i].stride;
-        else if (delta * brw->vb.current_buffers[i].stride != d)
+        if (delta * brw->vb.current_buffers[i].stride != d)
            break;
       }