i965/vs: Add a function for how many MRFs get written as part of a SEND.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_eu.c

diff --git a/src/mesa/drivers/dri/i965/brw_eu.c b/src/mesa/drivers/dri/i965/brw_eu.c
index 3b5c4c071e3416f2b5e217661067143bfa00bc73..0e04af99ff998db54b57a2423337583d74743b90 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_eu.c
+++ b/src/mesa/drivers/dri/i965/brw_eu.c
@@ -34,6 +34,30 @@
 #include "brw_defines.h"
 #include "brw_eu.h"
 
+#include "glsl/ralloc.h"
+
+/* Returns the corresponding conditional mod for swapping src0 and
+ * src1 in e.g. CMP.
+ */
+uint32_t
+brw_swap_cmod(uint32_t cmod)
+{
+   switch (cmod) {
+   case BRW_CONDITIONAL_Z:
+   case BRW_CONDITIONAL_NZ:
+      return cmod;
+   case BRW_CONDITIONAL_G:
+      return BRW_CONDITIONAL_LE;
+   case BRW_CONDITIONAL_GE:
+      return BRW_CONDITIONAL_L;
+   case BRW_CONDITIONAL_L:
+      return BRW_CONDITIONAL_GE;
+   case BRW_CONDITIONAL_LE:
+      return BRW_CONDITIONAL_G;
+   default:
+      return ~0;
+   }
+}
 
 
 /* How does predicate control work when execution_size != 8?  Do I
@@ -60,6 +84,11 @@ void brw_set_predicate_control( struct brw_compile *p, GLuint pc )
    p->current->header.predicate_control = pc;
 }
 
+void brw_set_predicate_inverse(struct brw_compile *p, bool predicate_inverse)
+{
+   p->current->header.predicate_inverse = predicate_inverse;
+}
+
 void brw_set_conditionalmod( struct brw_compile *p, GLuint conditional )
 {
    p->current->header.destreg__conditionalmod = conditional;
@@ -139,7 +168,8 @@ void brw_pop_insn_state( struct brw_compile *p )
 
 /***********************************************************************
  */
-void brw_init_compile( struct brw_context *brw, struct brw_compile *p )
+void
+brw_init_compile(struct brw_context *brw, struct brw_compile *p, void *mem_ctx)
 {
    p->brw = brw;
    p->nr_insn = 0;
@@ -147,12 +177,20 @@ void brw_init_compile( struct brw_context *brw, struct brw_compile *p )
    p->compressed = false;
    memset(p->current, 0, sizeof(p->current[0]));
 
+   p->mem_ctx = mem_ctx;
+
    /* Some defaults?
     */
    brw_set_mask_control(p, BRW_MASK_ENABLE); /* what does this do? */
    brw_set_saturate(p, 0);
    brw_set_compression_control(p, BRW_COMPRESSION_NONE);
    brw_set_predicate_control_flag_value(p, 0xff); 
+
+   /* Set up control flow stack */
+   p->if_stack_depth = 0;
+   p->if_stack_array_size = 16;
+   p->if_stack =
+      rzalloc_array(mem_ctx, struct brw_instruction *, p->if_stack_array_size);
 }
 
 
@@ -268,7 +306,7 @@ brw_resolve_cals(struct brw_compile *c)
        GLint offset = brw_sub_inst - brw_call_inst;
 
        /* patch brw_inst1 to point to brw_inst2 */
-       brw_set_src1(brw_call_inst, brw_imm_d(offset * 16));
+       brw_set_src1(c, brw_call_inst, brw_imm_d(offset * 16));
     }
 
     /* free linked list of calls */