i965/vec4: Don't lose the force_writemask_all flag during CSE.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_eu.c
index 5198f2807a7842249965af43cf82fc3c9b9250d5..146202ba24bed3b3140a3a01a52348f331bafc09 100644 (file)
@@ -34,7 +34,7 @@
 #include "brw_defines.h"
 #include "brw_eu.h"
 
-#include "glsl/ralloc.h"
+#include "util/ralloc.h"
 
 /**
  * Converts a BRW_REGISTER_TYPE_* enum to a short string (F, UD, and so on).
@@ -61,14 +61,36 @@ brw_reg_type_letters(unsigned type)
       [BRW_REGISTER_TYPE_UQ] = "UQ",
       [BRW_REGISTER_TYPE_Q]  = "Q",
    };
-   assert(type <= BRW_REGISTER_TYPE_UQ);
+   assert(type <= BRW_REGISTER_TYPE_Q);
    return names[type];
 }
 
+/* Returns a conditional modifier that negates the condition. */
+enum brw_conditional_mod
+brw_negate_cmod(uint32_t cmod)
+{
+   switch (cmod) {
+   case BRW_CONDITIONAL_Z:
+      return BRW_CONDITIONAL_NZ;
+   case BRW_CONDITIONAL_NZ:
+      return BRW_CONDITIONAL_Z;
+   case BRW_CONDITIONAL_G:
+      return BRW_CONDITIONAL_LE;
+   case BRW_CONDITIONAL_GE:
+      return BRW_CONDITIONAL_L;
+   case BRW_CONDITIONAL_L:
+      return BRW_CONDITIONAL_GE;
+   case BRW_CONDITIONAL_LE:
+      return BRW_CONDITIONAL_G;
+   default:
+      return ~0;
+   }
+}
+
 /* Returns the corresponding conditional mod for swapping src0 and
  * src1 in e.g. CMP.
  */
-uint32_t
+enum brw_conditional_mod
 brw_swap_cmod(uint32_t cmod)
 {
    switch (cmod) {
@@ -84,7 +106,7 @@ brw_swap_cmod(uint32_t cmod)
    case BRW_CONDITIONAL_LE:
       return BRW_CONDITIONAL_GE;
    default:
-      return ~0;
+      return BRW_CONDITIONAL_NONE;
    }
 }
 
@@ -141,9 +163,7 @@ brw_set_default_compression_control(struct brw_compile *p,
          brw_inst_set_qtr_control(brw, p->current, GEN6_COMPRESSION_1H);
         break;
       default:
-        assert(!"not reached");
-         brw_inst_set_qtr_control(brw, p->current, GEN6_COMPRESSION_1H);
-        break;
+         unreachable("not reached");
       }
    } else {
       brw_inst_set_qtr_control(brw, p->current, compression_control);
@@ -171,7 +191,7 @@ void brw_set_default_acc_write_control(struct brw_compile *p, unsigned value)
 void brw_push_insn_state( struct brw_compile *p )
 {
    assert(p->current != &p->stack[BRW_EU_MAX_INSN_STACK-1]);
-   memcpy(p->current+1, p->current, sizeof(struct brw_instruction));
+   memcpy(p->current + 1, p->current, sizeof(brw_inst));
    p->compressed_stack[p->current - p->stack] = p->compressed;
    p->current++;
 }
@@ -198,7 +218,7 @@ brw_init_compile(struct brw_context *brw, struct brw_compile *p, void *mem_ctx)
     * until out of memory.
     */
    p->store_size = 1024;
-   p->store = rzalloc_array(mem_ctx, struct brw_instruction, p->store_size);
+   p->store = rzalloc_array(mem_ctx, brw_inst, p->store_size);
    p->nr_insn = 0;
    p->current = p->stack;
    p->compressed = false;
@@ -240,13 +260,14 @@ brw_disassemble(struct brw_context *brw,
    bool dump_hex = false;
 
    for (int offset = start; offset < end;) {
-      struct brw_instruction *insn = assembly + offset;
-      struct brw_instruction uncompacted;
+      brw_inst *insn = assembly + offset;
+      brw_inst uncompacted;
       bool compacted = brw_inst_cmpt_control(brw, insn);
-      fprintf(out, "0x%08x: ", offset);
+      if (0)
+         fprintf(out, "0x%08x: ", offset);
 
       if (compacted) {
-        struct brw_compact_instruction *compacted = (void *)insn;
+         brw_compact_inst *compacted = (void *)insn;
         if (dump_hex) {
            fprintf(out, "0x%08x 0x%08x                       ",
                    ((uint32_t *)insn)[1],
@@ -267,6 +288,6 @@ brw_disassemble(struct brw_context *brw,
         offset += 16;
       }
 
-      brw_disassemble_inst(out, insn, brw->gen, compacted);
+      brw_disassemble_inst(out, brw, insn, compacted);
    }
 }