Merge remote-tracking branch 'mesa-public/master' into vulkan

[mesa.git] / src / mesa / drivers / dri / i965 / brw_eu.c

diff --git a/src/mesa/drivers/dri/i965/brw_eu.c b/src/mesa/drivers/dri/i965/brw_eu.c
index deeb4feb5bea42550502b75d55762bc1c2484274..1f4a3516fa2319273e2c5e14082df20c1b957dc2 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_eu.c
+++ b/src/mesa/drivers/dri/i965/brw_eu.c
@@ -111,43 +111,41 @@ brw_swap_cmod(uint32_t cmod)
 }
 
 void
-brw_set_default_exec_size(struct brw_compile *p, unsigned value)
+brw_set_default_exec_size(struct brw_codegen *p, unsigned value)
 {
    brw_inst_set_exec_size(p->devinfo, p->current, value);
 }
 
-void brw_set_default_predicate_control( struct brw_compile *p, unsigned pc )
+void brw_set_default_predicate_control( struct brw_codegen *p, unsigned pc )
 {
    brw_inst_set_pred_control(p->devinfo, p->current, pc);
 }
 
-void brw_set_default_predicate_inverse(struct brw_compile *p, bool predicate_inverse)
+void brw_set_default_predicate_inverse(struct brw_codegen *p, bool predicate_inverse)
 {
    brw_inst_set_pred_inv(p->devinfo, p->current, predicate_inverse);
 }
 
-void brw_set_default_flag_reg(struct brw_compile *p, int reg, int subreg)
+void brw_set_default_flag_reg(struct brw_codegen *p, int reg, int subreg)
 {
-   if (p->brw->gen >= 7)
+   if (p->devinfo->gen >= 7)
       brw_inst_set_flag_reg_nr(p->devinfo, p->current, reg);
 
    brw_inst_set_flag_subreg_nr(p->devinfo, p->current, subreg);
 }
 
-void brw_set_default_access_mode( struct brw_compile *p, unsigned access_mode )
+void brw_set_default_access_mode( struct brw_codegen *p, unsigned access_mode )
 {
    brw_inst_set_access_mode(p->devinfo, p->current, access_mode);
 }
 
 void
-brw_set_default_compression_control(struct brw_compile *p,
+brw_set_default_compression_control(struct brw_codegen *p,
                            enum brw_compression compression_control)
 {
-   struct brw_context *brw = p->brw;
-
    p->compressed = (compression_control == BRW_COMPRESSION_COMPRESSED);
 
-   if (brw->gen >= 6) {
+   if (p->devinfo->gen >= 6) {
       /* Since we don't use the SIMD32 support in gen6, we translate
        * the pre-gen6 compression control here.
        */
@@ -176,25 +174,23 @@ brw_set_default_compression_control(struct brw_compile *p,
    }
 }
 
-void brw_set_default_mask_control( struct brw_compile *p, unsigned value )
+void brw_set_default_mask_control( struct brw_codegen *p, unsigned value )
 {
    brw_inst_set_mask_control(p->devinfo, p->current, value);
 }
 
-void brw_set_default_saturate( struct brw_compile *p, bool enable )
+void brw_set_default_saturate( struct brw_codegen *p, bool enable )
 {
    brw_inst_set_saturate(p->devinfo, p->current, enable);
 }
 
-void brw_set_default_acc_write_control(struct brw_compile *p, unsigned value)
+void brw_set_default_acc_write_control(struct brw_codegen *p, unsigned value)
 {
-   struct brw_context *brw = p->brw;
-
-   if (brw->gen >= 6)
+   if (p->devinfo->gen >= 6)
       brw_inst_set_acc_wr_control(p->devinfo, p->current, value);
 }
 
-void brw_push_insn_state( struct brw_compile *p )
+void brw_push_insn_state( struct brw_codegen *p )
 {
    assert(p->current != &p->stack[BRW_EU_MAX_INSN_STACK-1]);
    memcpy(p->current + 1, p->current, sizeof(brw_inst));
@@ -202,7 +198,7 @@ void brw_push_insn_state( struct brw_compile *p )
    p->current++;
 }
 
-void brw_pop_insn_state( struct brw_compile *p )
+void brw_pop_insn_state( struct brw_codegen *p )
 {
    assert(p->current != p->stack);
    p->current--;
@@ -213,12 +209,12 @@ void brw_pop_insn_state( struct brw_compile *p )
 /***********************************************************************
  */
 void
-brw_init_compile(struct brw_context *brw, struct brw_compile *p, void *mem_ctx)
+brw_init_codegen(const struct brw_device_info *devinfo,
+                 struct brw_codegen *p, void *mem_ctx)
 {
    memset(p, 0, sizeof(*p));
 
-   p->brw = brw;
-   p->devinfo = brw->intelScreen->devinfo;
+   p->devinfo = devinfo;
    /*
     * Set the initial instruction store array size to 1024, if found that
     * isn't enough, then it will double the store size at brw_next_insn()
@@ -250,11 +246,11 @@ brw_init_compile(struct brw_context *brw, struct brw_compile *p, void *mem_ctx)
    p->loop_stack = rzalloc_array(mem_ctx, int, p->loop_stack_array_size);
    p->if_depth_in_loop = rzalloc_array(mem_ctx, int, p->loop_stack_array_size);
 
-   brw_init_compaction_tables(brw);
+   brw_init_compaction_tables(devinfo);
 }
 
 
-const unsigned *brw_get_program( struct brw_compile *p,
+const unsigned *brw_get_program( struct brw_codegen *p,
                               unsigned *sz )
 {
    *sz = p->next_insn_offset;
@@ -262,7 +258,7 @@ const unsigned *brw_get_program( struct brw_compile *p,
 }
 
 void
-brw_disassemble(struct brw_context *brw,
+brw_disassemble(const struct brw_device_info *devinfo,
                 void *assembly, int start, int end, FILE *out)
 {
    bool dump_hex = false;
@@ -270,7 +266,7 @@ brw_disassemble(struct brw_context *brw,
    for (int offset = start; offset < end;) {
       brw_inst *insn = assembly + offset;
       brw_inst uncompacted;
-      bool compacted = brw_inst_cmpt_control(brw->intelScreen->devinfo, insn);
+      bool compacted = brw_inst_cmpt_control(devinfo, insn);
       if (0)
          fprintf(out, "0x%08x: ", offset);
 
@@ -282,7 +278,7 @@ brw_disassemble(struct brw_context *brw,
                    ((uint32_t *)insn)[0]);
         }
 
-        brw_uncompact_instruction(brw->intelScreen->devinfo, &uncompacted, compacted);
+        brw_uncompact_instruction(devinfo, &uncompacted, compacted);
         insn = &uncompacted;
         offset += 8;
       } else {
@@ -296,6 +292,6 @@ brw_disassemble(struct brw_context *brw,
         offset += 16;
       }
 
-      brw_disassemble_inst(out, brw, insn, compacted);
+      brw_disassemble_inst(out, devinfo, insn, compacted);
    }
 }