Merge branch 'master' into asm-shader-rework-2

[mesa.git] / src / mesa / drivers / dri / i965 / brw_eu.h

diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index b36a1976efc9fc646d3f936d3b3d54cca683b8ab..30603bdd0e66058165d1ff7d21227dc687ac3d11 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -97,7 +97,7 @@ struct brw_glsl_call;
 
 
 #define BRW_EU_MAX_INSN_STACK 5
-#define BRW_EU_MAX_INSN 1200
+#define BRW_EU_MAX_INSN 10000
 
 struct brw_compile {
    struct brw_instruction store[BRW_EU_MAX_INSN];
@@ -170,6 +170,13 @@ static INLINE struct brw_reg brw_reg( GLuint file,
                                       GLuint writemask )
 {
    struct brw_reg reg;
+   if (type == BRW_GENERAL_REGISTER_FILE)
+      assert(nr < BRW_MAX_GRF);
+   else if (type == BRW_MESSAGE_REGISTER_FILE)
+      assert(nr < BRW_MAX_MRF);
+   else if (type == BRW_ARCHITECTURE_REGISTER_FILE)
+      assert(nr <= BRW_ARF_IP);
+
    reg.type = type;
    reg.file = file;
    reg.nr = nr;
@@ -531,6 +538,7 @@ static INLINE struct brw_reg brw_mask_reg( GLuint subnr )
 
 static INLINE struct brw_reg brw_message_reg( GLuint nr )
 {
+   assert(nr < BRW_MAX_MRF);
    return brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE,
                       nr,
                       0);
@@ -723,6 +731,13 @@ static INLINE struct brw_indirect brw_indirect( GLuint addr_subnr, GLint offset
    return ptr;
 }
 
+/** Do two brw_regs refer to the same register? */
+static INLINE GLboolean
+brw_same_reg(struct brw_reg r1, struct brw_reg r2)
+{
+   return r1.file == r2.file && r1.nr == r2.nr;
+}
+
 static INLINE struct brw_instruction *current_insn( struct brw_compile *p)
 {
    return &p->store[p->nr_insn];
@@ -801,6 +816,19 @@ void brw_urb_WRITE(struct brw_compile *p,
                   GLuint offset,
                   GLuint swizzle);
 
+void brw_ff_sync(struct brw_compile *p,
+                  struct brw_reg dest,
+                  GLuint msg_reg_nr,
+                  struct brw_reg src0,
+                  GLboolean allocate,
+                  GLboolean used,
+                  GLuint msg_length,
+                  GLuint response_length,
+                  GLboolean eot,
+                  GLboolean writes_complete,
+                  GLuint offset,
+                  GLuint swizzle);
+
 void brw_fb_WRITE(struct brw_compile *p,
                   struct brw_reg dest,
                   GLuint msg_reg_nr,
@@ -820,7 +848,9 @@ void brw_SAMPLE(struct brw_compile *p,
                GLuint msg_type,
                GLuint response_length,
                GLuint msg_length,
-               GLboolean eot);
+               GLboolean eot,
+               GLuint header_present,
+               GLuint simd_mode);
 
 void brw_math_16( struct brw_compile *p,
                  struct brw_reg dest,
@@ -841,12 +871,24 @@ void brw_math( struct brw_compile *p,
 
 void brw_dp_READ_16( struct brw_compile *p,
                     struct brw_reg dest,
-                    GLuint msg_reg_nr,
                     GLuint scratch_offset );
 
+void brw_dp_READ_4( struct brw_compile *p,
+                    struct brw_reg dest,
+                    GLboolean relAddr,
+                    GLuint location,
+                    GLuint bind_table_index );
+
+void brw_dp_READ_4_vs( struct brw_compile *p,
+                       struct brw_reg dest,
+                       GLuint oword,
+                       GLboolean relAddr,
+                       struct brw_reg addrReg,
+                       GLuint location,
+                       GLuint bind_table_index );
+
 void brw_dp_WRITE_16( struct brw_compile *p,
                      struct brw_reg src,
-                     GLuint msg_reg_nr,
                      GLuint scratch_offset );
 
 /* If/else/endif.  Works by manipulating the execution flags on each