i965/draw: Delay when we get the bo for vertex buffers

[mesa.git] / src / mesa / drivers / dri / i965 / brw_eu.h

diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index 1345db77c80faabe0bd4bf75e24734a47019e588..bea90f42f55a3d7de8da202c178ba0258ff48844 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -35,11 +35,9 @@
 
 #include <stdbool.h>
 #include "brw_inst.h"
-#include "brw_structs.h"
 #include "brw_defines.h"
 #include "brw_reg.h"
 #include "intel_asm_annotation.h"
-#include "program/prog_instruction.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -206,6 +204,14 @@ void brw_set_sampler_message(struct brw_codegen *p,
                              unsigned simd_mode,
                              unsigned return_format);
 
+void brw_set_message_descriptor(struct brw_codegen *p,
+                                brw_inst *inst,
+                                enum brw_message_target sfid,
+                                unsigned msg_length,
+                                unsigned response_length,
+                                bool header_present,
+                                bool end_of_thread);
+
 void brw_set_dp_read_message(struct brw_codegen *p,
                             brw_inst *insn,
                             unsigned binding_table_index,
@@ -317,6 +323,8 @@ void brw_oword_block_read(struct brw_codegen *p,
                          uint32_t offset,
                          uint32_t bind_table_index);
 
+unsigned brw_scratch_surface_idx(const struct brw_codegen *p);
+
 void brw_oword_block_read_scratch(struct brw_codegen *p,
                                  struct brw_reg dest,
                                  struct brw_reg mrf,
@@ -522,6 +530,10 @@ bool brw_try_compact_instruction(const struct brw_device_info *devinfo,
 void brw_debug_compact_uncompact(const struct brw_device_info *devinfo,
                                  brw_inst *orig, brw_inst *uncompacted);
 
+/* brw_eu_validate.c */
+bool brw_validate_instructions(const struct brw_codegen *p, int start_offset,
+                               struct annotation_info *annotation);
+
 static inline int
 next_offset(const struct brw_device_info *devinfo, void *store, int offset)
 {
@@ -533,12 +545,49 @@ next_offset(const struct brw_device_info *devinfo, void *store, int offset)
       return offset + 16;
 }
 
+struct opcode_desc {
+   /* The union is an implementation detail used by brw_opcode_desc() to handle
+    * opcodes that have been reused for different instructions across hardware
+    * generations.
+    *
+    * The gens field acts as a tag. If it is non-zero, name points to a string
+    * containing the instruction mnemonic. If it is zero, the table field is
+    * valid and either points to a secondary opcode_desc table with 'size'
+    * elements or is NULL and no such instruction exists for the opcode.
+    */
+   union {
+      struct {
+         char    *name;
+         int      nsrc;
+      };
+      struct {
+         const struct opcode_desc *table;
+         unsigned size;
+      };
+   };
+   int      ndst;
+   int      gens;
+};
+
+const struct opcode_desc *
+brw_opcode_desc(const struct brw_device_info *devinfo, enum opcode opcode);
+
 static inline bool
-is_3src(enum opcode opcode)
+is_3src(const struct brw_device_info *devinfo, enum opcode opcode)
 {
-   return opcode_descs[opcode].nsrc == 3;
+   const struct opcode_desc *desc = brw_opcode_desc(devinfo, opcode);
+   return desc && desc->nsrc == 3;
 }
 
+/** Maximum SEND message length */
+#define BRW_MAX_MSG_LENGTH 15
+
+/** First MRF register used by pull loads */
+#define FIRST_SPILL_MRF(gen) ((gen) == 6 ? 21 : 13)
+
+/** First MRF register used by spills */
+#define FIRST_PULL_LOAD_MRF(gen) ((gen) == 6 ? 16 : 13)
+
 #ifdef __cplusplus
 }
 #endif