for (int i = 0; i < 32; i++) {
if (control_index_table[i] == uncompacted) {
- brw_compact_inst_set_control_index(dst, i);
+ brw_compact_inst_set_control_index(devinfo, dst, i);
return true;
}
}
for (int i = 0; i < 32; i++) {
if (datatype_table[i] == uncompacted) {
- brw_compact_inst_set_datatype_index(dst, i);
+ brw_compact_inst_set_datatype_index(devinfo, dst, i);
return true;
}
}
for (int i = 0; i < 32; i++) {
if (subreg_table[i] == uncompacted) {
- brw_compact_inst_set_subreg_index(dst, i);
+ brw_compact_inst_set_subreg_index(devinfo, dst, i);
return true;
}
}
if (!get_src_index(uncompacted, &compacted))
return false;
- brw_compact_inst_set_src0_index(dst, compacted);
+ brw_compact_inst_set_src0_index(devinfo, dst, compacted);
return true;
}
return false;
}
- brw_compact_inst_set_src1_index(dst, compacted);
+ brw_compact_inst_set_src1_index(devinfo, dst, compacted);
return true;
}
if (devinfo->gen >= 9 || devinfo->is_cherryview)
uncompacted |= brw_inst_bits(src, 36, 35) << 24; /* 2b */
- for (int i = 0; i < ARRAY_SIZE(gen8_3src_control_index_table); i++) {
+ for (unsigned i = 0; i < ARRAY_SIZE(gen8_3src_control_index_table); i++) {
if (gen8_3src_control_index_table[i] == uncompacted) {
- brw_compact_inst_set_3src_control_index(dst, i);
+ brw_compact_inst_set_3src_control_index(devinfo, dst, i);
return true;
}
}
(brw_inst_bits(src, 104, 104) << 44); /* 1b */
}
- for (int i = 0; i < ARRAY_SIZE(gen8_3src_source_index_table); i++) {
+ for (unsigned i = 0; i < ARRAY_SIZE(gen8_3src_source_index_table); i++) {
if (gen8_3src_source_index_table[i] == uncompacted) {
- brw_compact_inst_set_3src_source_index(dst, i);
+ brw_compact_inst_set_3src_source_index(devinfo, dst, i);
return true;
}
}
static bool
has_unmapped_bits(const struct brw_device_info *devinfo, brw_inst *src)
{
+ /* EOT can only be mapped on a send if the src1 is an immediate */
+ if ((brw_inst_opcode(devinfo, src) == BRW_OPCODE_SENDC ||
+ brw_inst_opcode(devinfo, src) == BRW_OPCODE_SEND) &&
+ brw_inst_eot(devinfo, src))
+ return true;
+
/* Check for instruction bits that don't map to any of the fields of the
* compacted instruction. The instruction cannot be compacted if any of
* them are set. They overlap with:
return false;
#define compact(field) \
- brw_compact_inst_set_3src_##field(dst, brw_inst_3src_##field(devinfo, src))
+ brw_compact_inst_set_3src_##field(devinfo, dst, brw_inst_3src_##field(devinfo, src))
compact(opcode);
compact(dst_reg_nr);
compact(src0_rep_ctrl);
- brw_compact_inst_set_3src_cmpt_control(dst, true);
+ brw_compact_inst_set_3src_cmpt_control(devinfo, dst, true);
compact(debug_control);
compact(saturate);
compact(src1_rep_ctrl);
return imm == 0 || imm == 0xfffff000;
}
-/* Returns whether an opcode takes three sources. */
-static bool
-is_3src(uint32_t op)
-{
- return opcode_descs[op].nsrc == 3;
-}
-
/**
* Tries to compact instruction src into dst.
*
memset(&temp, 0, sizeof(temp));
- brw_compact_inst_set_opcode(&temp, brw_inst_opcode(devinfo, src));
- brw_compact_inst_set_debug_control(&temp, brw_inst_debug_control(devinfo, src));
+#define compact(field) \
+ brw_compact_inst_set_##field(devinfo, &temp, brw_inst_##field(devinfo, src))
+
+ compact(opcode);
+ compact(debug_control);
+
if (!set_control_index(devinfo, &temp, src))
return false;
if (!set_datatype_index(devinfo, &temp, src))
return false;
if (!set_subreg_index(devinfo, &temp, src, is_immediate))
return false;
- brw_compact_inst_set_acc_wr_control(&temp,
- brw_inst_acc_wr_control(devinfo, src));
- brw_compact_inst_set_cond_modifier(&temp,
- brw_inst_cond_modifier(devinfo, src));
+
+ if (devinfo->gen >= 6) {
+ compact(acc_wr_control);
+ } else {
+ compact(mask_control_ex);
+ }
+
+ compact(cond_modifier);
+
if (devinfo->gen <= 6)
- brw_compact_inst_set_flag_subreg_nr(&temp,
- brw_inst_flag_subreg_nr(devinfo, src));
- brw_compact_inst_set_cmpt_control(&temp, true);
+ compact(flag_subreg_nr);
+
+ brw_compact_inst_set_cmpt_control(devinfo, &temp, true);
+
if (!set_src0_index(devinfo, &temp, src))
return false;
if (!set_src1_index(devinfo, &temp, src, is_immediate))
return false;
- brw_compact_inst_set_dst_reg_nr(&temp, brw_inst_dst_da_reg_nr(devinfo, src));
- brw_compact_inst_set_src0_reg_nr(&temp, brw_inst_src0_da_reg_nr(devinfo, src));
+
+ brw_compact_inst_set_dst_reg_nr(devinfo, &temp,
+ brw_inst_dst_da_reg_nr(devinfo, src));
+ brw_compact_inst_set_src0_reg_nr(devinfo, &temp,
+ brw_inst_src0_da_reg_nr(devinfo, src));
+
if (is_immediate) {
- brw_compact_inst_set_src1_reg_nr(&temp,
+ brw_compact_inst_set_src1_reg_nr(devinfo, &temp,
brw_inst_imm_ud(devinfo, src) & 0xff);
} else {
- brw_compact_inst_set_src1_reg_nr(&temp,
+ brw_compact_inst_set_src1_reg_nr(devinfo, &temp,
brw_inst_src1_da_reg_nr(devinfo, src));
}
+#undef compact
+
*dst = temp;
return true;
brw_compact_inst *src)
{
uint32_t uncompacted =
- control_index_table[brw_compact_inst_control_index(src)];
+ control_index_table[brw_compact_inst_control_index(devinfo, src)];
if (devinfo->gen >= 8) {
brw_inst_set_bits(dst, 33, 31, (uncompacted >> 16));
set_uncompacted_datatype(const struct brw_device_info *devinfo, brw_inst *dst,
brw_compact_inst *src)
{
- uint32_t uncompacted = datatype_table[brw_compact_inst_datatype_index(src)];
+ uint32_t uncompacted =
+ datatype_table[brw_compact_inst_datatype_index(devinfo, src)];
if (devinfo->gen >= 8) {
brw_inst_set_bits(dst, 63, 61, (uncompacted >> 18));
set_uncompacted_subreg(const struct brw_device_info *devinfo, brw_inst *dst,
brw_compact_inst *src)
{
- uint16_t uncompacted = subreg_table[brw_compact_inst_subreg_index(src)];
+ uint16_t uncompacted =
+ subreg_table[brw_compact_inst_subreg_index(devinfo, src)];
brw_inst_set_bits(dst, 100, 96, (uncompacted >> 10));
brw_inst_set_bits(dst, 68, 64, (uncompacted >> 5) & 0x1f);
set_uncompacted_src0(const struct brw_device_info *devinfo, brw_inst *dst,
brw_compact_inst *src)
{
- uint32_t compacted = brw_compact_inst_src0_index(src);
+ uint32_t compacted = brw_compact_inst_src0_index(devinfo, src);
uint16_t uncompacted = src_index_table[compacted];
brw_inst_set_bits(dst, 88, 77, uncompacted);
brw_compact_inst *src, bool is_immediate)
{
if (is_immediate) {
- signed high5 = brw_compact_inst_src1_index(src);
+ signed high5 = brw_compact_inst_src1_index(devinfo, src);
/* Replicate top bit of src1_index into high 20 bits of the immediate. */
brw_inst_set_imm_ud(devinfo, dst, (high5 << 27) >> 19);
} else {
- uint16_t uncompacted = src_index_table[brw_compact_inst_src1_index(src)];
+ uint16_t uncompacted =
+ src_index_table[brw_compact_inst_src1_index(devinfo, src)];
brw_inst_set_bits(dst, 120, 109, uncompacted);
}
{
assert(devinfo->gen >= 8);
- uint32_t compacted = brw_compact_inst_3src_control_index(src);
+ uint32_t compacted = brw_compact_inst_3src_control_index(devinfo, src);
uint32_t uncompacted = gen8_3src_control_index_table[compacted];
brw_inst_set_bits(dst, 34, 32, (uncompacted >> 21) & 0x7);
{
assert(devinfo->gen >= 8);
- uint32_t compacted = brw_compact_inst_3src_source_index(src);
+ uint32_t compacted = brw_compact_inst_3src_source_index(devinfo, src);
uint64_t uncompacted = gen8_3src_source_index_table[compacted];
brw_inst_set_bits(dst, 83, 83, (uncompacted >> 43) & 0x1);
assert(devinfo->gen >= 8);
#define uncompact(field) \
- brw_inst_set_3src_##field(devinfo, dst, brw_compact_inst_3src_##field(src))
+ brw_inst_set_3src_##field(devinfo, dst, brw_compact_inst_3src_##field(devinfo, src))
uncompact(opcode);
{
memset(dst, 0, sizeof(*dst));
- if (devinfo->gen >= 8 && is_3src(brw_compact_inst_3src_opcode(src))) {
+ if (devinfo->gen >= 8 && is_3src(brw_compact_inst_3src_opcode(devinfo, src))) {
brw_uncompact_3src_instruction(devinfo, dst, src);
return;
}
- brw_inst_set_opcode(devinfo, dst, brw_compact_inst_opcode(src));
- brw_inst_set_debug_control(devinfo, dst, brw_compact_inst_debug_control(src));
+#define uncompact(field) \
+ brw_inst_set_##field(devinfo, dst, brw_compact_inst_##field(devinfo, src))
+
+ uncompact(opcode);
+ uncompact(debug_control);
set_uncompacted_control(devinfo, dst, src);
set_uncompacted_datatype(devinfo, dst, src);
brw_inst_src1_reg_file(devinfo, dst) == BRW_IMMEDIATE_VALUE;
set_uncompacted_subreg(devinfo, dst, src);
- brw_inst_set_acc_wr_control(devinfo, dst, brw_compact_inst_acc_wr_control(src));
- brw_inst_set_cond_modifier(devinfo, dst, brw_compact_inst_cond_modifier(src));
+
+ if (devinfo->gen >= 6) {
+ uncompact(acc_wr_control);
+ } else {
+ uncompact(mask_control_ex);
+ }
+
+ uncompact(cond_modifier);
+
if (devinfo->gen <= 6)
- brw_inst_set_flag_subreg_nr(devinfo, dst,
- brw_compact_inst_flag_subreg_nr(src));
+ uncompact(flag_subreg_nr);
+
set_uncompacted_src0(devinfo, dst, src);
set_uncompacted_src1(devinfo, dst, src, is_immediate);
- brw_inst_set_dst_da_reg_nr(devinfo, dst, brw_compact_inst_dst_reg_nr(src));
- brw_inst_set_src0_da_reg_nr(devinfo, dst, brw_compact_inst_src0_reg_nr(src));
+
+ brw_inst_set_dst_da_reg_nr(devinfo, dst,
+ brw_compact_inst_dst_reg_nr(devinfo, src));
+ brw_inst_set_src0_da_reg_nr(devinfo, dst,
+ brw_compact_inst_src0_reg_nr(devinfo, src));
+
if (is_immediate) {
brw_inst_set_imm_ud(devinfo, dst,
brw_inst_imm_ud(devinfo, dst) |
- brw_compact_inst_src1_reg_nr(src));
+ brw_compact_inst_src1_reg_nr(devinfo, src));
} else {
- brw_inst_set_src1_da_reg_nr(devinfo, dst, brw_compact_inst_src1_reg_nr(src));
+ brw_inst_set_src1_da_reg_nr(devinfo, dst,
+ brw_compact_inst_src1_reg_nr(devinfo, src));
}
+
+#undef uncompact
}
void brw_debug_compact_uncompact(const struct brw_device_info *devinfo,
}
void
-brw_compact_instructions(struct brw_compile *p, int start_offset,
+brw_compact_instructions(struct brw_codegen *p, int start_offset,
int num_annotations, struct annotation *annotation)
{
+ if (unlikely(INTEL_DEBUG & DEBUG_NO_COMPACTION))
+ return;
+
const struct brw_device_info *devinfo = p->devinfo;
void *store = p->store + start_offset / 16;
/* For an instruction at byte offset 16*i before compaction, this is the
offset += sizeof(brw_compact_inst);
} else {
- /* It appears that the end of thread SEND instruction needs to be
- * aligned, or the GPU hangs. All uncompacted instructions need to be
- * aligned on G45.
- */
- if ((offset & sizeof(brw_compact_inst)) != 0 &&
- (((brw_inst_opcode(devinfo, src) == BRW_OPCODE_SEND ||
- brw_inst_opcode(devinfo, src) == BRW_OPCODE_SENDC) &&
- brw_inst_eot(devinfo, src)) ||
- devinfo->is_g4x)) {
+ /* All uncompacted instructions need to be aligned on G45. */
+ if ((offset & sizeof(brw_compact_inst)) != 0 && devinfo->is_g4x){
brw_compact_inst *align = store + offset;
memset(align, 0, sizeof(*align));
- brw_compact_inst_set_opcode(align,
- devinfo->is_g4x ? BRW_OPCODE_NENOP :
- BRW_OPCODE_NOP);
- brw_compact_inst_set_cmpt_control(align, true);
+ brw_compact_inst_set_opcode(devinfo, align, BRW_OPCODE_NENOP);
+ brw_compact_inst_set_cmpt_control(devinfo, align, true);
offset += sizeof(brw_compact_inst);
compacted_count--;
compacted_counts[src_offset / sizeof(brw_inst)] = compacted_count;
if (p->next_insn_offset & sizeof(brw_compact_inst)) {
brw_compact_inst *align = store + offset;
memset(align, 0, sizeof(*align));
- brw_compact_inst_set_opcode(align, BRW_OPCODE_NOP);
- brw_compact_inst_set_cmpt_control(align, true);
+ brw_compact_inst_set_opcode(devinfo, align, BRW_OPCODE_NOP);
+ brw_compact_inst_set_cmpt_control(devinfo, align, true);
p->next_insn_offset += sizeof(brw_compact_inst);
}
p->nr_insn = p->next_insn_offset / sizeof(brw_inst);
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