i965: Add HiZ operation state to brw_context
[mesa.git] / src / mesa / drivers / dri / i965 / brw_eu_debug.c
index 91dbbd5af6203206051fcd73fd6b68f3f281e614..99453afdcafd976f06e5b83e6446d20363383db0 100644 (file)
@@ -54,9 +54,9 @@ void brw_print_reg( struct brw_reg hwreg )
       "f"
    };
 
-   _mesa_printf("%s%s", 
-               hwreg.abs ? "abs/" : "",
-               hwreg.negate ? "-" : "");
+   printf("%s%s", 
+         hwreg.abs ? "abs/" : "",
+         hwreg.negate ? "-" : "");
      
    if (hwreg.file == BRW_GENERAL_REGISTER_FILE &&
        hwreg.nr % 2 == 0 &&
@@ -65,17 +65,22 @@ void brw_print_reg( struct brw_reg hwreg )
        hwreg.width == BRW_WIDTH_8 &&
        hwreg.hstride == BRW_HORIZONTAL_STRIDE_1 &&
        hwreg.type == BRW_REGISTER_TYPE_F) {
-      _mesa_printf("vec%d", hwreg.nr);
+      /* vector register */
+      printf("vec%d", hwreg.nr);
    }
    else if (hwreg.file == BRW_GENERAL_REGISTER_FILE &&
            hwreg.vstride == BRW_VERTICAL_STRIDE_0 &&
            hwreg.width == BRW_WIDTH_1 &&
            hwreg.hstride == BRW_HORIZONTAL_STRIDE_0 &&
            hwreg.type == BRW_REGISTER_TYPE_F) {      
-      _mesa_printf("scl%d.%d", hwreg.nr, hwreg.subnr / 4);
+      /* "scalar" register */
+      printf("scl%d.%d", hwreg.nr, hwreg.subnr / 4);
+   }
+   else if (hwreg.file == BRW_IMMEDIATE_VALUE) {
+      printf("imm %f", hwreg.dw1.f);
    }
    else {
-      _mesa_printf("%s%d.%d<%d;%d,%d>:%s", 
+      printf("%s%d.%d<%d;%d,%d>:%s", 
                   file[hwreg.file],
                   hwreg.nr,
                   hwreg.subnr / type_sz(hwreg.type),