intel: Add a batch flush between front-buffer downsample and X protocol.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_eu_emit.c
index b55b57e2e82480a4ba65e1eab0a771716ec4ecda..ecf8597823f9234c7450915d190c9b97c8c2bb27 100644 (file)
@@ -515,7 +515,7 @@ static void brw_set_ff_sync_message(struct brw_compile *p,
 
 static void brw_set_urb_message( struct brw_compile *p,
                                 struct brw_instruction *insn,
-                                 unsigned flags,
+                                 enum brw_urb_write_flags flags,
                                 GLuint msg_length,
                                 GLuint response_length,
                                 GLuint offset,
@@ -2213,7 +2213,7 @@ void brw_urb_WRITE(struct brw_compile *p,
                   struct brw_reg dest,
                   GLuint msg_reg_nr,
                   struct brw_reg src0,
-                   unsigned flags,
+                   enum brw_urb_write_flags flags,
                   GLuint msg_length,
                   GLuint response_length,
                   GLuint offset,